Saturday, June 22, 2013

Fake Supercomputer


The Fake Supercomputer is an interim project that transitions one project to another. The idea is to construct a small low cost portable computer that has many of the functions and architecture of a supercomputer, for the purposes of learning the realm of the parallel world. The actual fake super computer is a fully working model that includes enhancements to the Propeller chip, adds more processors and speed, adds special software, and provides a powerful programming environment.

Initially, the FS was designed to have 1 to 25 Parallax Propeller chips in the Supertronic config. In the limit condition, the (25*2,720 MIPs) 68,000 MIPs machine would run in parallel and have a total of (25*32) 800 hard wired processors plus  25,000 VP processors for a total of 25,800 processors. The standard package would include the loader, enumerator, enhancer, parallel algorithm, and RTOS. In advanced versions, the RTOS is already incorporated with the enhancer.

By comparison, the Big Brain was measured at 100 Propeller chips before expansion. Speed enhancements apply with Supertronic giving 100 chips x 2,720 MIPs = 272,000 MIPs, and 100 chips x 32 hard processors = 3,200 hard wired processors + 100,000 VP processors, giving a total of 103,200 processors.