Wednesday, October 16, 2013

Basic Stamp Supercomputer Book

THE HAND BOOK OF BASIC STAMP SUPER COM- PUTING
by Humanoido

US$49.95
Special Big Brain Book Offer: Free! 

87 pages
USA Published

This is the first Handbook of BASIC Stamp Super computing. It includes build information, schematics, parts lists, photos, and information to construct three new BASIC Stamp Supercomputers.

It also includes many applications and project ideas, and a BASIC Stamp tutorial that covers hardware and software and actual working programs - included for testing and for running replicated consciousness with inherent native intelligence.

Download the index here
http://forums.parallax.com/attachmen...chmentid=63831

Download the book here
www.p-robot.com/index.php/handbook-of-basic-stamp-supercomputing.html



and here  File Type: pdf Handbook_Supercomputing_V1.pdf‎ 

Handbook of BASIC Stamp Supercomputing
Hosted by Penguin Robot Society (New Super Site) and Parallax

www.p-robot.com/ 
www.parallaxinc.com

The Handbook of BASIC Stamp Supercomputing
First Edition September 2009

Table of Contents
 
Table of Contents
Cover Photo                                                                    1
Introduction                                                                   2
Contents                                                                       3
Evolutionary                                                                   7
Why Build a Stamp Supercomputer?                                               7
About the Stamp BS1                                                            7
List of Features                                                               8
Configuration & Computing Power                                                8
Overall Design                                                                 9
Design Similarities to the BSS                                                 9
Skyscraper Tower Construction                                                 10
Skyscraper Personal Space                                                     11
Protective Ground Field - EMI/RFI Shielding                                   11
SSS Schematics                                                                12
Building Enumeration Circuits                                                 12
Decoupling Capacitors                                                         13
Additional BS1 Schematics                                                     13
    BS1 without a Brown out Detector                                          13
    BS1 Serial Adapter                                                        13
    Stamp 1 Project Board Schematic rev C                                     14
    The SIP BS1 module rev. A details                                         14
    OEM BS1 Stamp Rev. A                                                      15
    BS1 IC Module schematic Rev B                                             15
Brownout Detector                                                             16
SIP form BS1 rev. b with pin details                                          16
BS1 version D board                                                           16
Wiring                                                                        17
Supercomputer Assembly Instructions                                           17
Testing                                                                       18
Parts List & Cost Guide (2009) - Basic Stamp SEED                             18
Control Panel                                                                 18
Deterministic RC Circuits                                                     18
Peripherals                                                                   19
Optional Base Station Bstat                                                   19
Other Components, Tools and Supplies                                          19
Output                                                                        19
Power LED                                                                     19
Banner                                                                        19
Control Panel with Input Array                                                20
Wiring the Control Panel Pushbutton with LED                                  20
Wiring & Reading Toggle Switches/ LEDs                                        20
 – Assorted Example Circuits                                                  21
Switch Software                                                               21
All Computers - Pin Assignments                                               21
Computer 1 Port Assignments                                                   21
Computer 2 through 9 Port Assignments (8 computers)                           22
Computer 10 Port Assignments (1 computer)                                     22
Global Computer Ports (Availability Depends on Projects)                      22
Powering Up the Boards                                                        22
Running a Single Board                                                        22
Peripherals                                                                   22
Programming Section (SEED) Artificial Intelligence                            23
Life Form – Self Evolving Enumerated Deterministic Programming                24
How the Code Works                                                            24

Artificial Intelligence Software for the Stamp SEED Supercomputer             25
Artificial Intelligence Software                                              25
Code Posting                                                                  25
Sample Screens                                                                25
Only One Program                                                              25
Life Form                                                                     25
Unique                                                                        25
Life Span                                                                     25
Birth                                                                         25
Self Enumerating                                                              25
Self Deterministic                                                            25
Memory & Recall                                                               25
Napping & Random Dreaming                                                     25
Dream Watching                                                                26
Sleep & Fuzzy Clock                                                           26
Talking to Neighbors                                                          26
Listening to Neighbors                                                        26
Getting to Know Neighbors                                                     26
Remembering Neighbors                                                         26
Thinking & Working                                                            26
End of Life                                                                   26
Personalities                                                                 26
Restrictions                                                                  26
Becoming Sick                                                                 26
    Personified Maladies                                                      26
    Psychotic Breakdown                                                       26
    Fitful Sleep                                                              27
    Sudden Death                                                              27
Brain Amnesia                                                                 27
No Resuscitating Situation                                                    27
    Alternate Identity Syndrome                                               27
Stroke                                                                        27
    Stuttering                                                                27
Code Fit                                                                      27
Processor Type                                                                27
Changing the Code                                                             27
Flow Control                                                                  27
Running the Code & Watching Evolution                                         28
The Story of Supercomputer Life – Comments by Dr. Humanoido                   28
Life form Screens                                                             28
Stamp_ai.bs1 Code Listing                                                     29
    Introduction                                                              29
    Features                                                                  29
    Life Cycle Performance                                                    29
    Phases of SEED’s Minuscule AI                                             30
    History                                                                   31
    Phase 0     Preparing the Enumeration Pins                                31
    Typical Pin    1 Resistance Code Chart                                    32
    Phase I     Formation and Birthing Process                                32
            Variable Examples                                                 33
    Phase II     Personal Introduction, Flowchart                             34
            Some Program Elements                                             34
    Phase III    Self Enumeration - Creating a Self Aware Identity            34
    Phase IV     Thought Monitor                                              34
    Phase V     Self Determination                                            34
    Phase VI     Early Memory – Remembering Self Identity                     35
    Phase VII    Nap                                                          35
    Phase VIII    Dream                                                       35
    Phase IX    Developing a Sense of Time (Fuzzy Clock)                      36
    Phase X        Sleep                                                      36
    Phase XI    Conversation – Introduction to Neighbors                      37
    Phase XII    Conversation – Listen to Neighbors                           37
    Phase XIII    Memorizing the Identity of Neighbors                        37
    Phase XIV    Long Term Memory – Recall Identity of Neighbors              37
    Phase XV    Finding Purpose in Life – Do Work/Thinking                    37
    Phase XVI    Speak Plan Piezo Language                                    38
    Phase XVII    End of Life Cycle – Suspended Animation/Hybernation         38
    Self Modifying Code                                                       38
    Personal Sick Leave                                                       39
What happens when the program ends? Does the life form die?                   40
How to save or preserve the state of the life form?                           40
Multiple Ways to Program a Stamp Supercomputer – Wait then Retrieve Method    40
The Software – Self Modifying Code                                            40
The Language                                                                  41
Brain Scanning                                                                41
EEPROM Write Limitation                                                       41
Computer Enumerating Pin Circuits – Theory and Practicality                   41
Circuit                                                                       42
Part List for Enumerating Pin Circuit                                         42
SDEP.BS1 Program                                                              42
Syntax - POT Pin, Scale, Variable                                             43
    Variable                                                                  43
    Pot                                                                       43
    Finding the best Scale value                                              43
EEPROM (a directive at compile time, not at run time)                         43
Base Station (Bstat)                                                          45
History                                                                       45
Wireless Communications Transceiver                                           45
Transmitter and Receiver Specifications                                       46
Transmitter Supply Current                                                    46
Receiver Supply Current                                                       46
Theory of Operation                                                           47
PDN                                                                           47
RSSI (receiver only)                                                          47
Calibration                                                                   47
Source Code BASIC Stamp® 1 Example Programs                                   47
TxCode_v_1.0.bs1                                                              48
RxCode_v_1.0.bs1                                                              48
Power Distribution                                                            48
Power Draw                                                                    48
Piezo Speakers and Current Draw                                               48
Sleep Nap and Wake                                                            49
Demo Software                                                                 49
transmit.bs1                                                                  49
    Receive.bs1                                                               49
Software Section                                                              50
    SERIN Options of Driving the BS1                                          50
    SEROUT Options                                                            50
Paralleled Demo Programs                                                      51
    Computer 1 Network Code                                                   51
    Computer 2 Network Code                                                   51
    Computer 3 Network Code                                                   51
Piezo Speaker Test Programs                                                   52
    First Program                                                             52
    Second Program                                                            52
Piezo Language (PLAN) Expanded Option                                         52
PLAN Command List                                                             53
    Audible Command List                                                      53
    Representations                                                           53
    Hardware Control                                                          53
Applications Section: Ideas and Details                                       53
Application 1: Twinkle Power Lights!                                          53
    twinkle.bs1                                                               54
Application 2: Adding Push Buttons and Toggle                                 54
Application 3: Build a Jacob’s Ladder of Sound!                               54
Application 4: Solving the Riddle of Pullup and Pulldown                      54
Application 5: Using Pin for Input/Output - Sharing Pins (NV38)               54
Circuit: Display Status of I/O Pin - Detect Switch Input, Output to LED       55
Application 6: Create a Physically Rising Chromatic Scale                     55
Application 7: Create Ten-Note Chords                                         55
Application 8: Build a Bstat Base Station                                     55
Application 9: Add a Parallax 2x16 Serial Green Screen                        56
Application 10: Add a Parallax 2x16 Parallel Green Screen                     56
Application 11: Demonstrating the Hidden Low Power Mode                       56
Application 12: Long Term Memory Using EEPROM                                 57
    WRITE.bs1 Program                                                         58
LPM Discovery! (Hidden Low Power Mode)                                        59
Application 13: Handling RAM as Short Term Memory                             59
Application 14: Setting the Ports                                             60
Application 15: Developing Stamp Supercomputer Math                           61
    Mathematical Functions List, Math Examples                                61
Application 16: Mystery of the Vanishing EEPROM                               62

Application 17: Setting the Format of Pins                                    62
Application 18: Creating a Variable or Pin Alias                              62
Application 19: Reference a specific bit within a byte or word variable       62
Application 20: Determining Program Memory                                    62
Application 21: Performing Memory Dump                                        63
Application 22: Transmitting/Receiving Serial Messages Between BS1 Computers  63
    Serial Transmitter Code                                                   63
    Syntax & Function Study                                                   63
    SERIN.bs1 Program                                                         63
Application 23: Build a Minuscule Stamp Supercomputer                         64
    Minuscule Stamp Supercomputer Code                                        64
Application 24: Serial Communications by Computer Name                        64
    Transmitter Code                                                          64
    Receiver Code                                                             65
Application 25: One Talks and Many Will Listen                                65
Application 26: Number Talking and Listening, number_talker.bs1 Program       65
    number_listener.bs1 Program                                               65
Application 27: Direct Addressing by Personal Name                            65
Chip_talker.bs1 Program                                                       65
    Chip_listener.bs1 Program                                                 66
Application 28: Build Your Own Basic Stamp One Serial Interface               66
Application 29: Build a TriCore Stamp Supercomputer                           66
Simplified Stamp TriCore Supercomputer STS schematic                          67
Self Enumeration Schematic                                                    67
TriCore Supercomputer AI Software Listing, TriCore_AI.bs1 Program             67
Application 30: Putting Your Supercomputer to Sleep, Sleep.bs1 Program        71
Single Processor Specifications by Parallax                                   71
Actual Conditions Single Processor                                            71
Actual Conditions Ten Processors                                              71
Ten Processor Specifications                                                  71
Comparative Speed                                                             72
Upgrades and Improvements                                                     72
Cocooning for Transport                                                       72
Cocooning Procedure                                                           72
Coming Out of the Cocoon                                                      72
Resources and Links                                                           73
Parallax Basic Stamp 1 Applications Source                                    73
A Growing family of Supercomputers                                            73
The Basic Stamp Supercomputer family                                          73
Stamp Baby Supercomputer Announcement 06.10.09                                73

Short Guide to PBASIC 1 Instructions - Programming the BS1 Supercomputer      74
By Request - Interview with Dr. Humanoido                                     75
Project Developer - the Series of Basic Stamp Supercomputers                  75
Basic Stamp 1 Instruction List                                                76
PBASIC Programming Guidelines for the Stamp 1                                 83
Control Codes and Printing Characters                                         85
Sources                                                                       86
The Completed Stamp Seed Supercomputer                                        87

Tuesday, October 15, 2013

Master Offloader Machine

Seen at the right with a tower of green boards in the above photo, the latest upgrade add-on to the BSS BASIC Stamp Supercomputer introduces a ten-fold magnitude increase of unprecedented computing power!" Using the Master Offloader Machine, ten additional processor boards grind away with more computing power, extending the functions and speed.
The M.O.M. Master Offloader Machine is seen with ten Basic Stamp Project Boards in a tower format. The machine is battery operated off 9-volts. Communications reports to a serial LCD at the top. MOM led to the invention of the SEED Self Evolving Enumerating Deterministic BASIC Stamp Supercomputer Life Form.
MASTER OFFLOADER MACHINE
The Master Offloader Machine was conceived from the need to offload intensive duties of the Master Computer in the BASIC Stamp Supercomputer (BSS). MOM is the first supercomputing project to show that connecting together multiple BASIC Stamp 1s and Stamp 2 flavors is possible. Contains ten BS1 processors.

The Master Offloader Machine was conceived from the need to offload intensive duties of the Master Computer in the BASIC Stamp Supercomputer (BSS). M.O.M. was the first supercomputing project to show that connecting together multiple BASIC Stamp 1s and Stamp 2 flavors was possible. Contains ten processors.

This new machine, the Master Offloader, is a battery-driven collective added to the Basic Stamp Supercomputer to offload the intensive duties and responsibilities of the Master. It holds the addition of ten layers of smaller microcontroller processors (BS1 Basic Stamp Project Boards) that can potentially access half a hundred flash drives for millions of files under the SSD format. It can also free up the primary workers for more intensive processing. Connection is by wire, although a wireless system is now developed and being tested.

M.O.M. processing can now introduce simultaneous disk reads and writes - new paralleled clustered tasks that single drive driven processors cannot achieve. This opens up the potential for new worlds of applications never seen before, and a magnitude of unprecedented computing power at the hobby level.

A serial LCD green screen mounted at the top monitors serial talk traffic as the BSS and M.O.M. communicate back and forth. M.O.M is the forerunner of the SEED Artificial Intelligence Living Basic Stamp Supercomputer.

MOM Communication
The MOM design is very interesting. Even though the BS1 has a different rate of communication compared to the design of BS2 supercomputers, the ten computers in this cluster are linked and communicating with each other. The primary Master in rack one can use specific PINS to interface to MOM at MOM's rate of communication. This adds another usage pin to the overall design on the Master. This gives complete compatibility between the BS1 and its constituent family.


Comments About the Offloader Machine as Related to the BSS
"I am impressed. Very VERY impressed. Many of us fidget with one or two interfaces rather than try to envision larger integration. The main point is that the Basic Stamp is a powerful building block and in a modular open architecture it can begin to do sophisticated things that one Basic Stamp could never achieve. There will NEVER be an end to the BasicStamps useful life in the digital world." G. Herzog/Loopy Byteloose

"I have been following your work since you first posted and you have inspired me to try several new things on my own projects.· Your a very creative person!!" Just Jeff

"Obviously the most fertile mind in hobby computing today. humanoido has once again demonstrated his DaVinci-esqe capacity to think outside the box."  Ira Chandler/ Splashsplat

Hi Humanoido, Now you're moving into my world :) David Bayliss

I think its a great system Humanodo. A lot of us are learning about Stamp networking from this project... that alone is worth the time and effort (and money!) you've put into it. Ugha 

Humanoido had a great idea, worked on it and showed its practical results. It may not be perfect, as anything done by human beings (or humanoid beings...), but it works and it has given a lot of people new ideas to work on. And he is continually extending and refining his project, always posting pictures and all his software code (very well documented and understandable, BTW), according to the spirit of open source projects. vrossi

Your project is awesome humanoido. The Truth is Out There


Humanoido, Thanks for the large picture with the Master Offloader Machine. The appearance, and particularly the use of specific colors, is awesome. The vertical repetition works very nicely. Keep up the good work. Mike Green

Humanoido, Using your information and descriptions I now have 2 stamps "talking" in my current bot project and you saved me a lot of time and trouble. Thanks for your assistance! Just Jeff


Humanoido: I continue to be wowed by your tireless efforts. It's nothing short of inspiring to see how far you have taken the Stamp multiplexing concept, and I appreciate the passion with which you pursue both your Supercomputer upgrades and Penguin Tech magazine. I hope to someday receive such words of praise from Mike Green as you did above.Erco

Looks like this is the most popular forum thread here! I guess it all depends on the quality of your Prefrontal Cortex? Ezsynn

Humanoido: You're always open & receptive to input from the forum, that's a great quality about you. Erco

I like the idea. SRLM

LINKS
Master Offloader Technique
http://humanoidolabs.blogspot.tw/2012/01/master-offloader.html

Master Offloader Machine (MOM)
http://forums.parallax.com/showthread.php?p=765140

REFERENCES
SEED: Self Evolving Enumerating Deterministic Basic Stamp Supercomputer. A New Evolution in Stamp Supercomputer design
The Stamp SEED Supercomputer is a new concept. This is a ten core, nine month project, with the first AI Stamp software to fit into 256 bytes eeprom - self determinate, evolving, enumerating, dreaming, poetic, noisy, talkative, and downright friendly. It runs on only one program that self evolves differently in each of the ten computers. It's evolutionary - it's revolutionary!

http://humanoidolabs.blogspot.tw/2012/07/seed-supercomputer.html
http://humanoidolabs.blogspot.tw/2012/07/seed-supercomputer-part-2.html
http://forums.parallax.com/showthread.php?p=817126


The original Master Offloader Machine was developed for the BASIC Stamp Supercomputer in a hardware array of tandem processors. This technique is now in widespread use inside the Big Brain.

The Big Brain uses the Master Offloader technique (the technique is now upgraded to include hardware, software or both) which was developed for the BASIC Stamp Supercomputer in 2008 and 2009. Many techniques developed for the BSS are in place on the Propeller Big Brain platform. The M.O.M. is seen to the right of the BSS with ten battery operated green processor boards. Click the photo for a larger image.

The machine brain is divided up into brain quadrants. The quad includes a Propellerized Left Brain and a Right Brain. The technique of the Master Offloader is used between the Left Brain and the Right Brain. It's also used in the Quad design of the Brain. Offloading allows the Big Brain to continue functioning if one or more quadrants are busy, idle, sleeping, dreaming, disabled, errored, occupied, in stasis or powered down.

New Word Definitions
Offloading - the technique (using hardware, software or both) of offloading duties to another Brain quadrant, which allows the Big Brain to continue to function when one or more quadrants are busy, idle, sleeping, dreaming, disabled, occupied, in stasis, errored or powered down. 


Original Posting
This new machine, the Master Offloader, is added to the Basic Stamp Supercomputer to offload the intensive duties and responsibilities of the Master. It holds the addition of ten layers of smaller microcontroller processors that can potentially access half a hundred flash drives for millions of files under the SSD format. It can also free up the primary workers for more intensive processing. Connection is by wire, although a wireless system is now developed and being tested. MOM (Master Offloader Machine) processing can now introduce simultaneous disk reads and writes - new paralleled clustered tasks that single drive driven processors cannot achieve. This opens up the potential for new worlds of applications never seen before, and a magnitude of unprecedented computing power at the hobby level.

Minuscule Stamp Supercomputer


The updated and revised schematic shows additions including a peizo speaker and LED on each core. BASIC Stamp One Boards are now used, and for running tests with new parallel projects, TINY BUS is added. This creates a total of six parallel lines for data communications.

MINUSCULE STAMP SUPERCOMPUTER
Demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel

Build a Minuscule Stamp Supercomputer
Pump up the array with your BS1 stamp collection! This is a preview of the new Minuscule Stamp Supercomputer, comprised of only two BS1 boards. It’s main purpose is for testing various software in developing the Stamp SEED Supercomputer, without the need to load ten programs into ten processors. The two core Minuscule needs no tower and the boards can set next to each other on a desk next to the PC. The provided transmitter and receiver software is minuscule and serially enables one core to text communicate with the other at 2400 baud. The application is included with the Stamp SEED Supercomputer because most of the applications, principles and programming are the same. Plus, the Minuscule has no manual, so it gets its own featured space.


Introducing the Minuscule Stamp Supercomputer! It’s a perfect example of multiple BS1 boards connected together for sending and receiving serial signals (text) according to the transmit and receive programs listed below. The 2X boards chosen for this Minuscule Stamp Supercomputer, MSS, include the Carrier Board with a BS1-IC Basic Stamp Module, and the Stamp 1 Project Board Rev. B. Both boards are programmed through the PC’s USB port using Parallax adapters, a BS1 Serial Adapter, and a USBto232 adapter.

The MSS Minuscule Stamp Supercomputer has two BASIC stamp 1 boards networked together, and creates a very small parallel processing machine. The primary purpose is for rapid development of software and hardware testing where only two cores are required. The MSS was a vital tool in developing programs for the SEED BASIC Stamp Supercomputer and it stands on its own as a Stamp super computing machine.

Each board has an output LED for a display and a piezo speaker for sound prompting, signaling and debugging. Wiring is a one line interface and both processors compute in parallel.

New Schematic & Upgrade
Create a BS1 array with multiple cores designed for testing Stamp supercomputer designs. Instead of one data line, six are now possible. The entire port array is now filled and dedicated to processing. This opens up numerous options for testing parallel computing and communications. Programming apps can also be tested and developed in simple forms i.e. with two paralleled twin processors. The Minuscule Stamp Supercomputer is upgraded to a Parallel Computing Machine. This is the first upgrade posted since project thread inception on July-6-2009. Primarily this upgrades satisfies several conditions for testing the UltraSpark 40 Propeller-based Parallel Computing Machine, and series, found in the link. It has paved the way for the development of the Propeller powered Big Brain with over 100,000 processors.
 
Specs for One Stamp
Processor Speed: 4 MHz
Program Execution Speed: ~2,000 instructions/sec.
RAM Size: 16 Bytes (2 I/O, 14 Variable)
EEPROM (Program) Size: 256 Bytes ~80 instructions
Number of I/O Pins: 8
PBASIC Commands = 32

Specs for Two Stamps Minuscule
Processor Speed: 8 MHz
Program Execution Speed: ~4,000 instructions/sec.
RAM Size: 32 Bytes (4 I/O, 28 Variable)
EEPROM (Program) Size: 512 Bytes ~160 instructions
Number of I/O Pins: 16
PBASIC Commands = 32
Communication: Serial
Interface: One Wire


Initially there was no schematic for the MSS because the connections are so simple. Just follow the chart below using two BS1 boards and some wire leads. The only component required is a 1K ohm resistor.

vss - vss vdd - vdd vin - vin pin0 - pin0
vss to 1K R to pin 0 (inverted)


Build the MSS and have lots of fun testing all your new code! Demo code in text is provided below for easy copy.

' {$STAMP BS1}                ' Minuscule Stamp Supercomputer
' {$PBASIC 1.0}               ' Serial Transmitter – Send a Text Character
PAUSE 5000                    ' Load into computer 1
SEROUT 0, ON2400, ("g",10,13) ' Transmit a text character + CR + LF
END                           ' Quit
' {$STAMP BS1}                ' Minuscule Stamp Supercomputer
' {$PBASIC 1.0}               ' Serial Receiver – Receive a Text Character
SYMBOL x = B0                 ' Load into computer 2
SERIN 0,N2400, x              ' Receive one text character
DEBUG #@x                     ' Show text on the debug screen
END                           ' Quit


Here's what Parallax says about the BS1 Engine
www.parallax.com/Store/Microcontrollers/BASICStampModules/tabid/134/CategoryID/9/List/0/SortField/0/Level/a/ProductID/3/Default.aspx
It's amazing what you can accomplish with this well-proven microcontroller and its simple PBASIC 1 language. All vital components (processor, clock source, memory, power regulator) are provided on the BS1's tiny PCB; just connect power and go! BASIC Stamp 1 Project Board (#27112) Development / Education Platform for the BASIC Stamp 1 Introduction- When the BASIC Stamp 1 was introduced 10 years ago nobody could foresee the impact this ingenious little controller would have on the electronics world; at both the hobbyist and professional levels. The original BASIC Stamp 1 (BS1) and its big brothers, the BASIC Stamp 2 family, have sold millions of units all over the world, and into every application and industry one can imagine. The BASIC Stamp 1 has been used for years in award-winning Science Fair projects, in industry, in hobbyist and professional robotics, in television and motion picture props and special effects the BS1 has a long and illustrious track record you're in very good company when you choose it. The BS1 Project Board is a low-cost reintroduction of the original BASIC Stamp in a HomeWork Board type platform that has become a standard for students, hobbyists, and even professional engineers. The board includes everything you need to get started with microcontroller applications at minimal expense just add your external circuits, code, and imagination.
 
BASIC Stamp 1 Project Board
www.parallax.com/Store/Microcontrollers/BASICStampDevelopmentBoards/tabid/137/CategoryID/12/List/0/SortField/0/Level/a/ProductID/119/Default.aspx 

For students, hobbyists, and professionals who desire the small form and features of the BASIC Stamp® 1 microcontroller, but need a development platform in the mold of the Parallax Board Of Education and HomeWork boards; the BASIC Stamp 1 Project Board is low-cost solution that is sure to fit the bill. The BS1 Project Board consists of a surface-mounted BASIC Stamp 1 on a 3 1/4" x 2 1/2" (8.3 x 6.4 cm) printed circuit board. The board includes a 9V battery clip, a mechanically interlocked 2.1 mm power jack, DB-9 connector for programming, and LM2936 regulator providing 40 mA for your projects.

* Red LED power indicator with On/Off Switch
* Mechanically interlocked power supply, prevent dual connection of wall-pack/9-volt battery
* DB9 connector for BS1-IC programming and serial communication during run-time.
* 0 – P7 I/O pins, Vin, Vdd and Vss connections brought adjacent to prototyping area
* Includes 1 3/8" x 2" (5.1 x 3.5 cm) solderless breadboard
* 220 Ω resisitors on all I/O pins for protection
* Power Requirements: 5.5 to 15 VDC
* Communication: Serial for Programming (default to 2400 baud)
* Dimensions: 4.00 x 3.05 in (102 x 77 mm)
* Operating Temperature: +32 to +185 °F (0 to 70 °C)

BASIC Stamp 1 Project Board Technical Specifications
Microcontroller - Microchip PIC16C56A
Speed - 4 MHz
Program Execution Speed - ~2,000 instructions per second
EEPROM Size - 256 bytes (93LC56)
Program Length - ~80 instructions
Inputs / Outputs - 8
Source / Sink Current per I/O - 20 mA / 25 mA
Source / Sink Current (device) - 40 mA / 50 mA
Power Consumption - 7 mA running (no loads); 5 mA Sleep (Rev B) 1
PC Interface - Serial, 4800 baud (programming and DEBUG)
Editor (Windows only) - STAMPW.EXE (Version 2.1 or higher)
Power Supply - 6 15 volts DC (2.1 mm, center-positive), or 9-volt battery
PCB Size - 31/4" x 21/2" (with 1/8" corner mounting holes)
Project Area - 13/8" x 2" solderless breadboard or through-hole mounting pads 2


1. Rev B boards - the power LED remains illuminated when the BASIC Stamp is in sleep mode
2. Not all pads are available for general-purpose use


Additional Resources
The following materials are available for download from www.parallax.com:


* BASIC Stamp Programming Manual (Downloads Documentation)
* BASIC Stamp 1 Applications Notes (Downloads Documentation)
* Nuts & Volts "Stamp Applications"
* The Elements of PBASIC Style


STAMP AI SOFTWARE
There is a possibility of creating a Minuscule version of Stamp AI. Let me know if you'd like to see artificial intelligence on two Stamp computers.

SPIN OFF PROJECT
A spin-off of this project is a tiny tester for parallel computing machines.

LINKS
Stamp SEED Supercomputer 
Basic Stamp Supercomputer
TriCore Stamp Supercomputer
Minuscule Stamp Supercomputer
Tiny Stamp Supercomputer
Penguin with 12 Brains
BASIC Stamp Supercomputing Book
Three Dimensional Computer 
StampOne News!
Penguin Tech 
Penguin Robot Society 
Humanoid Toddler Robot  
Ultimate List Prop Languages 
Prop-a-Lot *Propalot Stuff 
Prop SC Computer 
Prop Skyscraper 
Hobby Space Program 

Note: Some links may need updating using the converter (see link below)
 

Smart BoeBothttp://forums.parallax.com/forums/default.aspx?f=6&m=469004

Multiprop Project List

http://forums.parallax.com/forums/default.aspx?f=25&m=472019

Tiny Tester for Developing Parallel Algorithms

http://forums.parallax.com/showthread.php/124433-Tiny-Tester-for-Developing-Parallel-Algorithms?p=927796#post927796

Link Converter 
http://forums.parallax.com/showthread.php/126151-Forum-URL-Converter?p=943996#post943996 

UltraSpark 40
http://forums.parallax.com/showthread.php?p=921524

More About Basic Stamp Supercomputers

MORE ABOUT BASIC STAMP SUPERCOMPUTERS
If you're looking for an interesting Stamp Spring project, here's an index to BASIC Stamp Supercomputers and a brief overview of each. (by request)

BASIC Stamp Supercomputer
Demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel

Why create a BASIC Stamp Supercomputer? I'm a hobbyist that loves BASIC Stamps. I have fun and enjoy learning new things by making interesting and challenging projects. All the information is offered free of charge so the projects can be duplicated and customized by others. I hope it will lead to many enjoyable learning experiences.

Intro: a Parallax BASIC Stamp Supercomputer is a fun hobby project that connects together multiple BASIC Stamps, in a network, to make "the many more powerful than the one." The name Supercomputer is in context of making one Stamp computer into a super Stamp computer with more capability not possible with just one Stamp. The comparison of "superness" is within the genre of BASIC Stamps.

The gains are significantly more ports, faster speed, more programming code statements, more sophisticated programming, paralleled operations, increase in sensor and peripheral abilities, and numerous techniques available to Parallax BASIC Stamp Supercomputers.

BASIC Stamp Supercomputers range from a simple low cost two processor unit (Minuscule or Two Stamp) on up to larger units (Basic Stamp Supercomputer BSS) with 20 to 30 processors. So there is a project within everyone's grasp in terms of affordability and level.

Brief Overview - Basic Stamp Supercomputers

BASIC Stamp Supercomputer

http://forums.parallax.com/showthread.php?p=765140
1st hobby supercomputer using BASIC Stamps. Popularized putting together many processors to make a more powerful machine. Improved and upgraded to contain over 20 stamps.

Stamp SEED Supercomputer
http://forums.parallax.com/showthread.php?p=817126
World’s 1st living stamp supercomputer. Ten Stamp processors - each is a life form. They are born, develop a unique personality, talk to neighbors, remember conversation, recall information, do work, nap, sleep, and dream. Includes wireless transceiver.

TriCore Stamp Supercomputer
http://forums.parallax.com/showthread.php?p=822511
For testing and developing other supercomputers. Three Stamp processors = minimum requirement to test/ develop the Stamp SEED Supercomputer. Rapidly load/test multiple processor code. Includes lite version of life form code from Stamp SEED Supercomputer.

Minuscule Stamp Supercomputer
http://forums.parallax.com/showthread.php?p=821451
Smallest possible supercomputer, lowest cost, increases power of one processor. Contains two processors. Used for testing/writing code related to connecting Stamps together, establishing baud rates, timing/syntax, and exploring various network configurations.

Tiny Stamp Supercomputer
Appeared in Robot Magazine, Learn Section. The world's 1st first hand-held BASIC Stamp supercomputer. Absolutely most powerful, considering it has the smallest footprint with many tiny networked processors. Has its own book with 30 fun projects. Includes Architecture, Assembly, Programming, Tutorial, Applications, Complete Code. The TSS has multiple computers, LCD monitor, radio transmitter, receiver, speakers, breadboard real estate and a 64K EEPROM memory board, interfaced to a tiny Hub. The TSS Stamp supercomputer is so small, it will fit into a soup bowl or coat pocket. Includes special features such as hardware programming "on the fly."

Two-Stamp BASIC Stamp Supercomputer
http://forums.parallax.com/showthread.php?p=765140
The wiring for connecting a BS2sx to a BS2px BASIC Stamp processor - how to amplify the power of one Stamp. This is entirely different from the Minuscule Stamp Supercomputer which uses different BASIC Stamp processors.

Handbook of Basic Stamp Supercomputing
http://forums.parallax.com/showthread.php?p=841541
This book is written to answer many questions about hobby BASIC Stamp Supercomputers and offer a starting point for construction of your own Stamp Supercomputer. Includes apps and programming and many details to get you started immediately. Delves into Stamp Artificial Intelligence and many aspects of Stamp super computing. Electronic version is posted and available for download free of charge.

Penguin with 12 Brains (aka Penguin on Supercomputer)
http://forums.parallax.com/showthread.php?p=765509
World's smartest Parallax Penguin Robot. In this project, Penguin's brain was connected to the BASIC Stamp Supercomputer. This created the potential to write 16,000 instructions, added all the resources of the Basic Stamp Supercomputer, 176 controlling ports, color uOLED display, green screen LCD, ultrasonic vision, presence sensors, memory, speech in English and Chinese.

Master Offloader Machine (MOM)
http://forums.parallax.com/showthread.php?p=765140
The Master Offloader Machine was conceived from the need to offload intensive duties of the Master Computer in the BASIC Stamp Supercomputer (BSS). MOM was the first supercomputing project to show that connecting together multiple BASIC Stamp 1s and Stamp 2 flavors was possible. Contained ten processors.

3DSC (4 Dimensional Morphing Computer)
http://forums.parallax.com/showthread.php?p=799604
World’s first 3D Stamp Computer to explore a multi-dimensional universe. Initially designed for simple space-time simulations. Includes three networked BASIC Stamp 1’s using Dx boards. Upgraded to include two servo-driven moving cores. Many applications developed for advanced hobbyists, students, teachers, designed for classrooms, high school Physics and advanced university level experiments with sound, light, time, motion, heat, etc. Upgraded with a Stamp 2 coprocessor.

Stamp SEED Supercomputer
Basic Stamp Supercomputer
TriCore Stamp Supercomputer
Minuscule Stamp Supercomputer
Tiny Stamp Supercomputer
Penguin with 12 Brains
BASIC Stamp Supercomputing Book
Three Dimensional Computer StampOne News!
Penguin Tech *Penguin Robot Society 
Toddler Humanoid Robot Project
Ultimate List Prop Languages 
Prop-a-Lot 
Prop SC Computer
Prop IB Hypercomputer
Robotic Space Program

SuperStamp

1st SuperSTAMP - marriage of Stamp & Propeller
SUPERSTAMP

The SuperSTAMP is a very powerful BASIC Stamp "module" made from a Parallax BS2 Board of Education and a Propeller Proto Board. The added features and resources create added capabilities and power that go far beyond the original Stamp.

SuperSTAMP sets on the green work pad
You can thank the Big Brain for its spinoff projects leading to the SuperSTAMP.

How was the SuperSTAMP born? During the 2010-2011 time period, the Big Brain project developed a Brain Stem. As it was receiving more wiring, a transformation took place. Upon completed, it became a fully functional integrated module inside the giant brain and it also became the world's first SuperSTAMP built from Big Brain technology!



PHOTO: In November of 2010, the first Brain Stem was completed and tested. Seen here it sets on the green pad for further analysis. At that time, the Brain did not exist and was only a vision in the mind's eye!

The SuperStamp was first blogged within the Parallax Forum "Fill the Big Brain" thread. It was a transformation from a working Big Brain Stem. The duality of Stamp and Propeller enabled the creation of a SuperSTAMP, much more powerful than a single stamp, more powerful than a single Propeller, with 9 cores instead of 1 or 8.

A nine core machine
Communications was developed and tested on the first Propeller positioned above the first BS2 which became known as the SuperSTAMP. The SuperSTAMP is another project developed to give maximum power to a BASIC Stamp. The SuperSTAMP mates to the PPPB and consists of both Tx and Rx programs along a common protected BUS. It's essentially a BASIC Stamp enhanced with the addition of one propeller chip that adds eight additional cores.

Wiring Diagram for a SuperSTAMP "Brain Stem." Another napkin sketch, the Stem consists of a Propeller board (PPPB) and a BASIC Stamp 2 Board (BOE). Test wiring is straightforward.

Robotic Brain Stem Discovery Thread
http://forums.parallax.com/showthrea...611#post955611

Overview
The Brain Stem is one of the most important parts of the Brain. It resides below the Brain Base. The Stem passes signals like a nerve center for reflex, muscle and primarily mobility control. It harnesses mobility software to give the brain motion control.

Compatibility
The Brain Stem has another purpose. It serves as a commonality compatibility interface with other processor-based robots, for example, Parallax robots using BASIC Stamps. It is also compatible with Propeller-based robots, including the Boe-Bot, SumoBot, S2, Stingray, QuadRover, and is an ideal candidate for the Robot Base Full Kit.

SuperSTAMP
Communications was developed and tested on the first Propeller above the first BS2 which is known as the SuperSTAMP. The SuperSTAMP is another project developed to give maximum power to a BASIC Stamp. The SuperSTAMP mates to the PPPB and consists of both Tx and Rx programs along a common protected BUS.


COMMUNICATIONS

Revealing SUPERSTAMP test code
This chronicles the development of test code, phase I, for the Brain Stem. Note, the Brain Stem is made up from two boards, a BOE and a PPPB.


Wiring
Important wiring note. The schematic shows a Propeller to Stamp connection but does not show the lines running from Vss to Vss. Note that Vdd to Vdd is not implemented as the Propeller is a 3.1-volt device and the Stamp is a 5-volt device. The actual feed is from the Stamp regulator to gain the 5-volts and from the external power supply to gain the 3.1 volts.

Programming Code

Brain Stem code consists of one folder with three files.

PROP-BS2 LEVEL5.bs2
PROP-BS2-LEVEL5.spin
BS2_Functions.spin

    Operating the Programs
    Load the first program into the BS2. This will act as the receiver. Load the second "Propeller" program and run it. This is the transmitter.


    Testing
    In the test, the Propeller is continually talking to the Stamp and the Stamp is listening. The Stamp code makes use of the the Debug screen for output.


    Error Detection
    The code also has error detection. If the system hangs, a timeout occurs and a message is given. Following this, the loop will continue looking for the next character.


    Prop to STAMP Voltage Levels
    The BUS data transmission from the Prop to the Stamp is a compatible voltage level.


    ORIGINAL DISCOVERY THREAD
    http://forums.parallax.com/showthread.php/124495-Fill-the-Big-Brain?p=982969&viewfull=1#post982969

    CODE DOWNLOAD

    File Type: zip brainstem code.zip‎ (16.2 KB, 4070 views)