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UltraSpark 40 - Super Microcontroller
A Propeller project with 40 prop chips providing 320 RISC computers with 1,280 ports and 6,400 to 8,320 MIPS speed.
DOCUMENTED FROM JULY 10, 2010
(demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel)
This is a simple hobby project designed for pure fun and enjoyment! It may be the most fun project I've ever worked on (cool toy). I only started with the prop about 2 months ago. Thanks to everyone on the forum who posted helpful comments as I learned more SPIN and elements of assembler code. Also thanks to those addicted prop-heads who convinced me to take a look at the Propeller chip. I took a look and this is what happened. It's all your fault!
EDIT: the US40 has become a much more massive project taking several turns of development. It is being used primarily now for Academics. Additional posts underscore continuing developments.
Photo montage shows various views of a simple multiple Propeller chip ongoing project. It will morph into various configurations as new circuits are tested.
Price & Disclaimer
This is a pure hobby project for my personal enjoyment and use only, and is not for sale. If the project does not satisfy your requirements, keep in mind that it was not intended to do so. This is not a product, and the descriptions are offered as is, in whatever degree or lack of degree of completeness for your inspiration and ideas. Good luck!
Form Factor
The UltraSpark 40 easily fits onto a desktop with its small form factor. The space between the Proto Boards is reduced using smaller 5/8-inch spacers. For size comparison, the IBM ThinkPad is the black object under the SkyScraper.
SkyScraper (Tower)
The first Skyscraper took on this shape using 20 Parallax Proto Boards and nylon spacers to achieve a minimal 5/8" board-to-board spacing. Spacing is determined by the vertical height of the board's 1000uF electrolytic capacitor. The SkyScraper has three sides of the board supported. The open end allows more easy routing of wires and cables (not shown in these early pics).
UltraSpark 40 Specifications
40 Props DIP Mix with SMT, Model Number: P8X32A-D40
320 Tiny RISC Computers
Processor/cog/small risc computer Per Chip: Eight
Architecture: 32-bits
Math: Integer and Floating Point
Standard System Clock Speed: DC to 80 MHz
Overclocked to 100MHz
Global RAM/ROM: 40x64 K bytes; 40x32 KRAM / 40x32 KROM
Cog RAM: 512 x 32 bits each x 320 cogs
1,280 ports
640 Counters
20 Dual Expanded Proto Boards with SMT Props
20 Socketed Prop DIPs
Hypered Stack Configuration
Socket Twins Concept
6.4 Billion IPS Standard (Instructions Per Second)
(40 props * 8 cogs * 20 mips = 6,400 MIPS, 6.4BIPS ~= 64MFLOPS)
8.32 Billion IPS Overclocked
(40 x 8 cogs x 26 mips = 8,320 MIPS. 8.32 BIPS ~= 83.2MFLOPS)
Computer Programming Languages approaching 200
Open Ambient or Compressor Cooling
Tiny Parallel Architecture
Computing Array: Parallel Clustering
IEX Technology Endowed
Ext PS Enabled
EEPROMs for Programming, Indexing
Reconfigurable Whole Cubes up to 6 x 6 x 6
Video 3.5-inch TFT LCD AV 4:3 Panel NTSC/PAL 320 x 240 Pixels 12V 3.5W
Terminals
Prop Terminal + special version of FemtoBASIC
Emulation
Emulators: TV, Mouse, and Keyboard
Compatibility/Expansion
HW Proto Boards
HW HYDRA
HW Propeller Demo Board
SW Prop Terminal (virtual keyboard, TV, mouse & keyboard)
SW Digital Storage Scope
OIT (Optics Interface Transceiver)
P-BUS (Prop BUS)
DEEPROM (Dual-EEPROMs)
FLEXPANDABLE (upward mobility path)
SIGNAL ROAMER (not confined to boards)
SKYSCRAPER Expanding F1, F2, F3 ... or B1, B2, B3 ...
Testing Various Designs
Multi-Interface MINT encompasses the chip to chip communications
Circuits for downloading one program into all the props (bootloader)
Path for maintaining 'across the Skyscraper' critical timing
Special oscillator to handle all mult props
Nominal RFI/EMI blanket shield
What is it for?
Hobby only (fun)
Pure Academics
Robots, Robot Control, Sensors
Education, Schools, Students, Educators
Tiny & Simple Parallelism Exampling
running benchmarks
new programming
developing new parallel programming languages
developing & testing new circuits
running many different programming languages
new experiments
exploring capability of 320 little computers running at the same time
developing new apps
robot brain
testing
multi-games
pushing the limits
testing and developing a small neural net
solving codes
New Algorithms
Currently an interest has developed in parallel and various algorithms which has led to some very interesting experiments and results.
Software & Wiring Criteria
Wiring is simplified
Wiring is easily changeable
Speed is maximized for the interface used
Interface facilitates loading all props at the same time
Interface handles frequency synchronization
Code handles identifications
Minimal power consumption is implemented
Interface is compliant with parallel programming and code
Wiring Real Estate Provided
Parts/Circuits are green configured
Software Download
Current software is available and can be downloaded at the Parallax Propeller OBEX. The UltraSpark 40 is a flexible machine and not confined to one design. However, if you want to duplicate the first fundamental design, most of the single wire serial interface drivers will work.
Schematic Download
The schematic that I used is the same as the BASIC Stamp Supercomputer and can be downloaded at that thread. A modification to the value of the resistor may be needed.
Hardware
The first setup included a wire bus in Daisy Chain mode that threaded all of the prop boards through pin 0 and the twin prop. Wire wrap technology is used because the twin prop can be removed and the board will be available for other configurations and recycling into larger projects. A front end prop experiment (one HYDRA) provides TV, Keyboard, game controllers, VGA, mouse, and numerous more capability.
Concept
There are two concepts for communicating internally - 1) the Master/Slave technique and 2) the deterministic approach. More information and examples are provided in the Handbook of BASIC Stamp Supercomputers. The BASIC Stamp Supercomputer uses the Master/Slave approach while the SEED Stamp Supercomputer uses Tiny AI. The UltraSpark 40 can run programs with either approach although different deterministic methods are used for the latter.
Photos & Wires
From a time standpoint, the first pics were taken immediately after the SkyScraper stack was built. This is different from the BASIC Stamp Supercomputer project that had hundreds or thousands of wires protruding. The first UltraSpark 40 design is much more lean and intentionally wired as compact as possible. At higher frequencies there is a consideration to keep wires shortened, and minimal. With overclocking and 100MHz frequencies, such wiring efficiency becomes more important.
Overclocking
I'm experimenting with overclocking and have some very good results. I've found that use of solderless breadboards is possible if the clock is not raised over 100 MHz. Wires need to be kept non looping and minimal length with proper gauge selected. Overclocking raises the current consumption dramatically. Be prepared to use a power supply that can handle the increased amps. If machines are built massively bigger than the UltraSpark 40 with overclocking, they may need to tap into adjacent rooms for power, like a kitchen and a living room for example.
Cryogenic SuperCooling
There's ongoing research and some experiments being developed for supercooling to around dry ice temperatures. Peltier devices are favored though other methods are being tested. More equipment is needed to make this self running. The Cryogenic chamber can be approximately the same as that of the ST4 Astronomical CCD Super Cooled Imaging camera sensor chip. Grouping chips and enlarging the chamber will benefit future designs. I may introduce Virtual CCD Cooling concepts across the Propeller chip.
Color Coding
Colored wire is coded throughout so if a wire falls off, it can easily be remedied by color grouping techniques.
Mixing Art & Science
As some have pointed out, projects may appear have a degree mix of art and science. It may be the way the photos are composed or the construction style of the device, or the way that it can be re-purposed. It's perfectly valid to style your projects by morphing together art and science.
Predecessor Machines
There are at least sixteen machines built before the UltraSpark 40. Each of these machines was utilized to test functions and lay the groundwork for a larger machine. Each project was recycled into the next larger machine. The list will be updated with historical data in a future post.
Demo Board for confirmation
HYDRA front end for mouse, keyboard, TV, VGA
PEK 1 prop on breadboard
2-Prop-Experiment 2 props, 1 PEK, 1 on same breadboard
Spark 2 2 props, 1 Proto Board, one in parallel, recycled for Spark 4
PIGGY-TWINS 2 props, one piggybacked on another
Dueling Breadboards 2 props, one on ea., f/interface tests
Spark 4 Tiny Tim 4 props 2 proto bds w/2 props on ea
Spark 5 5 props, 5 stacked proto boards, Spark 6 forerunner
Spark 6 6 props 3 proto boards 2 props on ea board, led to Spark 8
Spark 8, Tertiary ADJUNCT 8 props 4 proto boards w/2 props on ea
Propalot - 10 props on solderless breadboard, led to Spark 10
Spark 10, 10 props 5 protos 10 props total, Twelvenator forerunner
Twelvenator aka Board of Twelve, 12 props, green board
UltraSpark 15 15 props, interrupted stack Proto Boards
Tertiary 20 20 props, 15 proto boards stacked 5 props, photos
UltraSpark 20 20 props stacked, photos
MLEPS 25 props, boards/breadboards, stripped for UltraSpark 40
Additional Results & Ongoing Studies
Banking experiments
Loading techniques
New inventions (BIN)
PWR management
Horizontal forms
Adjunctive considerations
Forms of communication using LEDs (cheap)
Exploring advantages of FP processing and analysis
BUS expansion
Additional designs with COUNTERs
Chunk space signaling
How a neuron can be implemented
Recycling
(New!) Additions to the US40
Floating Point
Hybrid Integer and FP Mode
Addtl. Processor Functions
Addtl. States in Trinary
Speed Test
Languages
Guest Commentator
It is with great honor that we have comments from Forest Godfrey, a man who has worked on building the world's fastest Jaguar Supercomputer.
http://forums.parallax.com/showthread.php?t=125674&page=2
I like the "supermicrocontroller" name to describe Humanoido's tower. It's phenomenal at doing the things microcontrollers do well: controlling GPIO pins, talking low-level hardware protocols, controlling screens, etc. If your goal is to create a cool piece of microcontroller hardware that nobody else has and can control massive amounts of I/O, the Prop Tower is pretty darn sweet. I've been working to get us to use a Prop in our control paths. Forest Godfrey
