Tentative New UT BASIC Stamp Supercomputer
A new spinoff of the BSS is in the design works.
The intended configuration will have the smallest physical design of all BASIC Stamp supercomputers created to this date. The current plan is for a plane of processors, not a stack. A tiny green board will be used with sockets and computers, and will plug in and unplug for reconfiguring. This may end up as an Ultra Tiny shirt pocket sized machine. Plans are to include a version of Tiny AI that will run on a sub-core level of the machine's capacity, probably the first three cores. If time permits, a larger core Tiny AI version will be written. At this time, two Tiny AI programs exist, one for 3-cores (the Tri-Core) and one for 10-cores (SEED).
From 12-10-2010, 02:36 AM
Tentative New UT BASIC Stamp Supercomputer
A new spinoff of the BSS is in the design works. The intended configuration will have the smallest physical design of all BASIC Stamp supercomputers created to this date. The current plan is for a plane
of processors, not a stack. A tiny green board will be used with sockets and computers, and will plug in and unplug for reconfiguring. This may end up as an Ultra Tiny shirt pocket sized machine. Plans are to include a version of Tiny AI that will run on a sub-core level of the machine's capacity, probably the first three cores. If time permits, a larger core
Tiny AI version will be written. At this time, two Tiny AI programs exist, one for 3-cores (the Tri-Core) and one for 10-cores (SEED).
Monday, October 14, 2013
TSS Tiny Stamp Supercomputer
The World's 1st Hand-Held BASIC Stamp "Supercomputer"
by Humanoido
This is the TSS Tiny Stamp Supercomputer that appeared in Robot Magazine.
In the January/Feb. 2011 issue of Robot magazine, page 16 in the LERN section you saw the BASIC Stamp Supercomputer. This is actually the new portable project TSS - Tiny Stamp Supercomputer that uses seven cores and a BELKIN USB HUB. In the same issue of Robot magazine, you can see two more articles about robot humanoids in China.
(demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel)
The BASIC Stamp Clustered Supercomputer series is a number of hobby projects to design BASIC Stamp microcontroller clusters with more power compared to a single Stamp. The name supercomputer is indicative of the increase in power by comparing to a single stamp.
Absolutely the most powerful in terms of the smallest footprint with many tiny Stamp networked processors. It’s a cluster of Stamps in your hand. Has its own book with 30 fun projects. Includes Architecture, Assembly, Programming, Tutorial, Applications, Complete Code. The TSS has multiple computers, LCD monitor, radio transmitter, receiver, speakers, breadboard real estate and a 64K EEPROM memory board, all interfaced to a tiny Hub. The TSS Stamp supercomputer is so small it will fit into a soup bowl or coat pocket. Includes special features such as hardware programming "on the fly."
The Tiny Stamp Supercomputer (TSS) is the first hand-held Basic Stamp Supercomputer. It’s the smallest in the series of Parallax Basic Stamp supercomputer projects by Humanoido. It is also the first USB Stamp supercomputer, made possible by the innovative BS1USB board made by Parallax. This project compliments the Basic Stamp Supercomputer (BSS), the Stamp Baby Supercomputer (SBS/Baby), and the Propeller (MELS) supercomputer.
Price & Disclaimer
This is a pure hobby project for my personal enjoyment and use only, and is not for sale. If the project does not satisfy your requirements, keep in mind that it was not intended to do so. This is not a product, and the descriptions are offered as is, in whatever degree or lack of degree of completeness for your inspiration and ideas. Good luck!
ABOVE: This is a view of the new “hand-held” Tiny USB Stamp Supercomputer TSS during construction. Seven computers, LCD monitor, radio transmitter, receiver and a 64K EEPROM memory board are interfaced to a Belkin USB Hub. The Stamp supercomputer is so small, it will fit into a soup bowl or Parka coat pocket. The yellow wires are for the port-to-port one wire interface. The black wires are adjoining Vss and red wires are Vdd. White represents a serial signal wire. By comparison, the American penny shows the extreme tiny features of the TSS Tiny Stamp Supercomputer!
Tiny includes an optional serial “green screen” by Parallax, pulling a whopping 20ma, the most power hungry device in this ultra tiny array. This is actually a miniscule power draw. In fact, the supercomputer consumes so little power, it would be a good candidate for solar power. Note the position of two computers located in the front behind the LCD. The remainder computer array is located to the rear of the USB hub.
How to Build Tiny - Building Up the USB Hub First build up the USB Hub by attaching three small solderless breadboards using their self adhesive sticky tape on the back side. Locate the breadboards according to the photo. Each breadboard side has 17 rows of 5 pins for 85 holes to a side, giving a total of 170 holes perboard. This makes a total of 510 wire and component mounting positions with all three breadboards. The hub has eight lights (one red power light and seven green LEDs indicating connected USB devices). The USB Basic Stamps have seven green LED lights indicating power on status. Tiny has a total of fifteen status lights.
Tiny is a powerful array of seven BS1USB computers connected to a Belkin HI-Speed USB 2.0 powered 7-port Hub. The 7-port Belkin Hub’s advantage is its ability to provide considerable power to the USB devices (Stamps) simultaneously, and peripherals, not drawing from the laptop’s limited power source. Each tiny Stamp PCB contains vital components (processor, clock source, memory, power regulator).
Tiny packs a punch in a small package and is loaded with features and peripherals. Let’s take the grand tour!
Affixed to the high speed USB hub are seven Parallax BS1USB computers, seven piezo speakers, a Parallax 433 Mhz radio transmitter, a matching receiver, Parallax serial LCD green screen monitor, eight pushbutton keypad, DS1620 Digital Thermometer, Parallax EEPROM non-volatile memory board, and a Parallax QT113-D Touch Sensor. Tiny can access other Stamp Supercomputers located within a full city block, communicate with a Base Station, and cluster together entire Stamp supercomputers located around the city!
Historically, the 3DSC is the forerunner of Tiny, and the first 3DSC Stamp clustered array to incorporate the BS1. The BS1 is filled with advantages, in terms of tiny power consumed, tiny footprint, large number of ports, and large capabilities for more powerful hobby BASIC Stamp clustered machines.
Wiring & Assembly Step by Step
Wiring is accomplished from port to component and component to port using the computer’s on board SIP socket and small gauge wire, plus the three small Parallax solderless breadboards attached to the Belkin Hub housing. This will support numerous additional supercomputer components and sensors.
( ) Plug in seven BS1USB computers to the Belkin 7-port hub
( ) Run a wire from P0 Computer 1 to P0 on Computer 2. Repeat to Computer 7.
( ) Connect all grounds together with jumper wires (Vss)
( ) Connect all +5 volts together (Vdd)
( ) Consult the schematic to wire the peripherals
Tiny Stamp Supercomputer Parts List
Parts for the Main Supercomputer
7 - Parallax BS1USB Board
1 – Belkin Powered High Speed USB 2.0 Hub
3 – Parallax Solderless Breadboards
4 – Rubber Bands
30 – Pin to Pin Jumper Wires
Peripherals Used in this Project, from Parallax
7 – Five Volt Piezo Speakers
1 – Green Screen Serial LCD
1 – 433 Mhz Radio Transmitter
1 – 433 Mhz Radio Receiver
1 – 64K EEPROM Memory Board
Parts for Project Applications
1 – Low Power Parallel LCD
1 – Temperature Chip DS
1 – Capacitor .1uf
1 – Touch Sensor QT113
1 – 470 Ohm Resistor
1 – LED
10 – Toggle Switches
10 – 1K Ohm Resistor
7 – 220 Ohm Resistor
APP 22
CaS Cell
Capacitor .1uf
Wiring “On the Fly”
A unique feature of TSS is that it can be wired and rewired as you are moving from one location to another. It’s a portable wiring feature that enables much more function due to simple access of its circuits.
Test Software for Each Computer
The test program loads into each of the USB stamps. When running the clustered code, after each stamp is programmed, the USB cable can be disconnected and the hub is removed from the laptop. All computers will remain powered on and functional.
' {$STAMP BS1}
' {$PBASIC 1.0}
DEBUG "hello world"
END
Test Software for the Cluster Interface
Test software for networking the cluster is seen below. This code includes timing routines. Each computer sleeps a designated time period and wakes to perform a task.
Loading in Code to Seven Computers
When loading a program, the menu appears to select any one of the seven Basic Stamps. Simply click on the desired computer, 1 through 7, and the code will load. This process is the most simple of all the Stamp/Propeller supercomputers.
Loading code into each computer is a very simple process. Wait for this window to appear and select the stamp to receive the code.
The BS1USB is tiny, measuring only 2.26-inches long, .73-inch wide and .3-inch thick. Right: the back side of each board has a legible pin code printed in white.
Features
- 7 Computers (BS1USB)
- Fifty-Six Ports (configurable as inputs or outputs)
- Each Computer 2.26-inches Length x .73-inch Width x .3-inch Thickness
- Overall Stock Supercomputer 4 ¾ wide x 4 ¾ deep x 2 ½ height
- Each I/O pin sources 20ma and sinks 25ma
- All I/O pins on one computer can source 40ma and sink 50ma
- Each Computer has an on-board USB interface
- Two Vss, Two Vdd and eight pin I/O connectors
- 7-Port Belkin High Speed Powered USB 2.0 Hub
- Memory: 64K Serial EEPROM Memory Board
- Two Thousand Four Hundred Bits Per Second Transfer Rate
Single Processor Specifications
- Microcontroller PIC16C56a
- Processor Speed: 4 MHz
- Program Execution Speed: ~2,000 PBASIC instructions/sec.
- RAM Size: 16 Bytes (2 I/0, 14 Variable)
- EEPROM (Program) Size: 256 Bytes; ~80 PBASIC instructions
- Current Draw @ 5 VDC: 1mA Run, 25 μA Sleep
- Number of I/O Pins: 8
- Source/Sink Current per I/O: 20 mA / 25 mA
- Source/Sink Current per unit: 40 mA / 50 mA
- PBASIC Commands: 32
- PBASIC Language: v1.0
- Scratchpad RAM: n/a
- PC Interface: USB
- Windows Text Editor Version: Stampw.exe (v2.0 and above)
- Breadboard Area: 1 3/8 x 2" solderless breadboard or through-hole mounting pads
Seven Processor Specifications
- Seven Cores
- Core Speed 28Mhz
- Program Execution Speed: ~14,000 PBASIC instructions/sec.
- RAM Size: 112 Bytes (14 I/0, 98 Variable)
- EEPROM (Program) Size: 1,792 Bytes; ~560 PBASIC instructions
- Current Draw @ 5 VDC: 7mA Run, 175 μA Sleep
- Number of I/O Pins: 56
- Techniques for 448 inputs, or 112 I/Os
- Source/Sink Current per I/O: 20 mA / 25 mA
- Source/Sink Current per unit: 40 mA / 50 mA
- Source/Sink Current per supercomputer I/O: 280 mA / 450 mA
- Breadboard Area: about 14 by 20”
Comparative Speed to the Cray 1 Supercomputer
Don’t expect too much speed compared to the worlds fastest supercomputers today or even desktop computers! This is a small hobby supercomputer and is super in terms of comparison to one Stamp in the same genre.
If you want to convert the actual speed to OPS, operations per second, a chart will illustrate the example. The SBS runs at about 20,000 IPS (instructions per second). FLOPS is floating point operations per second. Grossly approximating IPS to FLOPS, the SBS is about 20 kiloFLOPs or one fifth of a megaFLOP (MIP). By comparison, the Cray 1 supercomputer was in the MIPs range (millions of instructions per second). So one could roughly say the SBS is only approaching the speed of the Cray supercomputer.
Expansion Peripherals
The Tiny Stamp Supercomputer can be expanded with these low power peripherals:
Expansion Peripherals Computer Ports Used Each Power (ma)
- Computer 1 N/A 1ma=run, 25ua=sleep
- Parallax LCD 2x16 1 1 20
- Memory Board 7 1 10
- 433 Mhz Radio Transmitter 3,4 1 10
- 433Mhz Radio Receiver 3,4 1 5.2
- One Port 8-Pushbutton Keypad 2 1 5.0
- Touch Sensor 6 1 1.5
- DS1620 Digital Thermometer 5 3 1.0
- Piezo Speaker 1-7 1 1.0
7-Port Belkin High Speed Powered USB 2.0 Hub Specs
- Upstream Ports 1
- Downstream Ports 7
- Per-port Voltage DC +5V
- Per Port Current 500mA (max)
- Power Mode Self Powered (AC Power Adapter)
- Operating Temp 5deg ~ 40deg C
- Storage Temp -20deg ~ 60deg C
- Enclosure ABS
- Power Supply Output: DC 5V, 3.8A
- Plug Size: 3.5mm outer, 1.0mm center
- Plug Polarity: Center Positive
- Red Power LED Off Not Operational
- Power Status LED Green Fully Operational, Off Over-current Condition
One Wire Interface The Stamp supports an open baud mode that switches to +5 volts dc only instead of ground. This is the open-source configuration, selected by an argument beginning with ON, such as ON2400. The 1K ohm resistor goes to ground.
Interesting Comments
USB Computer Ports
You might think it's possible to plug three USB Stamp boards into your computer's USB ports and begin clustered computing. Not possible with most computers. The sum current draw exceeds the amount of deliverable power from the combined USB ports on the PC computer. A powered Hub is needed to remedy this by supplying full power to all USB Stamp boards.
Non-Powered USB Hubs
You might think it's possible to just plug multiple USB Stamp boards into any USB hub and computing is possible. Not possible. A powered hub will be needed. You can try one or two Stamps in a non powered hub, but with 3 or more it is likely to exceed pc power capacity.
Powered USB Hubs
Even with some non-powered USB hubs, there is an incompatibility with some brands. Even a Belkin non-powered hub will not drive three or more Stamps.
Schematic Center
Check out the hi-res version of this rare BS1USB Schematic in the PDF file (download as seen below).
BS1usb_sch.pdf
(112.8 KB, 1219 views) SOFTWARE
==============================================
A Snoozer Program to put individual cores to sleep for ten seconds, then do a wake-up call based on a pause statement.
' {$STAMP BS1}
' {$PBASIC 1.0}
Snoozer:
DEBUG CLS, "Sleep for 10 seconds"
SLEEP 10 ' Sleep for 10 seconds
DEBUG CLS, "awake now!"
PAUSE 1000 ' Awake for a second, or set timing here
GOTO Snoozer
==============================================
The standard Hello World program is a good first test for each core.
' {$STAMP BS1}
' {$PBASIC 1.0}
DEBUG "hello world"
END
==============================================
Determine memory used by a PBASIC Program
Use this code to determine memory consumed by a PBASIC program. On the BASIC Stamp I, enter the following code at the start of your PBASIC1 program:
'***MEMORY USED***
READ 255,B0
DEBUG #B0
' ****************
Upon running the program, a number will display in the debug window of the editor. Use the following equation to determine how many bytes are used by your PBASIC1 code: 255 - # - 6; where # is the number displayed on the debug window. Note, the “- 6” in the equation results from the fact that the above two lines of code take 6 bytes of program space, thus without those two lines, your program takes 6 fewer bytes of space.
Cores, Parallelism, Determinism
The little TSS machine has seven cores which is numerically defined by the Belkin HUB. As a purely academic comparison, the TSS can use all seven cores at the same time in parallel, with true determinism. This aspect is similar to a Propeller chip's eight cogs.
In this particular fashion, Propeller cogs can be simulated or emulated on a simple level. The TSS has huge robotics potential for controlling numerous sensors at the same time. Cores can operate servos while the vision center can continue to function, for example. If you have some of these tiny BS1USB boards handy, this is one way to find a good use for all the processors with this simple project.
In the TSS, seven of BS1 USB boards connect to a powereed HUB. Small pin connectors are enough for wiring when combined with several tiny solderless breadboards. Dimensions of this board are: 2.25 x 0.75 x 0.35 in (5.72 x 1.91 x 0.89 cm).
In the TSS, seven of BS1 USB boards connect to a powereed HUB. Small pin connectors are enough for wiring when combined with several tiny solderless breadboards. Dimensions of this board are: 2.25 x 0.75 x 0.35 in (5.72 x 1.91 x 0.89 cm).
Running Core Software
============================================== Serial Communications programs are in the Handbook of BASIC Stamp Supercomputing.
This PBASIC code sets up the Master-Slave concept and establishes Talk/Listen rules for simple communication.
============================================== TinyAI is found in the BASIC Stamp SEED Supercomputer post (runs on ten cores).
PBASIC code utilizes ten cores to set up AI. The same program loads into each core and evolves. Requires ten deterministic pin circuits. The schematic is written in the software comments. In the code, remove three processors to run on the TSS.
============================================== TinyAI for the TriCore is found with the BASIC Stamp TriCore Supercomputer post (runs on 3 cores).
This code is written in PBASIC and utilizes three cores to set up AI. The same program loads into each core and evolves. Requires three deterministic pin circuits. The schematic is written in the software comments. In the code, add 4 processors to gain the total of 7, or run as is on the TSS using 3 processors, as a sample program.
==============================================
ANNOUNCEMENT
This is to announce the hobby TSS Tiny BASIC Stamp Supercomputer and update the family list of BASIC Stamp supercomputing machines.
The TSS is number SEVEN out of seven BASIC Stamp Supercomputers and Stamp Computing Machines. BASIC Stamp Supercomputers now include the following family. For links, refer to the signature.
BSS - BASIC Stamp Supercomputer SEED - BASIC Stamp SEED Supercomputer TRICORE - Three Cores MINUSCULE - Minimal Two Core Machine TSS - Tiny BASIC Stamp Supercomputer MOM - Master Offloader Machine TWO STAMP BSS (BS2sx + BSpx) AM - The Algorithm Machine
The Grapevine Speculation
Will there be another BSS? Considering that the BSS family and its spinoffs now encompass almost all BASIC Stamp boards and modules, it is possible that the torch may pass on to the Propeller chip. The question is, are there any new Stamp boards or modules that could be utilized in future projects that would show some new features? There is some thought about making a "super stamp" out of a Propeller chip. The Super Stamp would have the extra memory and speed (+cogs) of the prop, yet program in BASIC and have PBASIC functions and a similar module form factor. There is some discussion about using the SPIN Stamp for this purpose. One idea is moving towards more cost effective multiplicities. The propeller chip is about $1 per computer and this remains highly competitive. So what is coming up? You will begin to see some enhancements for modules and chips that can be applied to the BASIC Stamp and the Propeller chip, as well as dedicated supercharged machines.
AUTHOR COMMENTS
The education that I get from these supercomputers is the greatest value and it continues. The Basic Stamp Supercomputer is the first in a continuing line of similar projects with additional features and strengths. I consider each project to be a step on a ladder, reaching upwards towards a higher plateau of evolution. With each, there's testing and designing of new circuits and new software, and I do my best to make the details and plans available to everyone to hopefully have as much fun as I have and share in the information.
I began avidly putting multiple Stamps together back around the year 2002, to create a kind of bigger and better brain for humanoid robots. I recall experimenting with two to four connected Stamps to gain added ports and extended software commands and do serial control of servo motors. My overall goal was to create a giant brain that could power humanoid robots. The plan was to use upwards towards hundreds of BASIC Stamp processors!
I am still on the learning path of more powerful super computers, and have another BASIC Stamp version in the works that's very unique and useful. I have also progressed to the Propeller chip with eight cores. You have to blame those guru dudes on the forum for egging me on to start with the prop. They have caused such a propeller passion that consumes all my time! :)
You can read about the Propalot saga in "Propalot Stuff." It describes the continuing evolution of connecting together ten Propeller chips on a breadboard to create a tiny little paralleled cluster. This cluster is evolutionary from my viewpoint - containing 80 computers and 320 controlling ports, running at up to 2,000 MIPS. That's two billion instructions per second in a space the size of your dinner plate. The uses are learning, fun, trying out various designs, experimenting, wiring up hardware, learning SPIN and other languages, programming various effects, etc...
Another surprising benefit of the BSS and SEED supercomputers is that they bring new friends. Nearly every week, someone requests that I run one of the supercomputers through its paces. Of course the talking BSS is very impressive to my Chinese friends, because it's programmed it to speak in Chinese. But I must say, the SEED supercomputer, is loved by everyone. They enjoy watching the life forms evolve and to see their responses on the debug screen (such as getting to know the neighbors, memorizing, reciting, napping, sleeping, working, etc.) Each of the ten processors have a little beeping piezo speaker and we all know they are talking back and forth to each other in some kind of binary code.
One time, the program finished and about 10 minutes later - suddenly- they started beeping to each other. Your guess is as good as mine... I have no idea what they were talking about... (the program had become too big and some parts were overwritten and it took on a mind of its own)
============================================== Serial Communications programs are in the Handbook of BASIC Stamp Supercomputing.
This PBASIC code sets up the Master-Slave concept and establishes Talk/Listen rules for simple communication.
============================================== TinyAI is found in the BASIC Stamp SEED Supercomputer post (runs on ten cores).
PBASIC code utilizes ten cores to set up AI. The same program loads into each core and evolves. Requires ten deterministic pin circuits. The schematic is written in the software comments. In the code, remove three processors to run on the TSS.
============================================== TinyAI for the TriCore is found with the BASIC Stamp TriCore Supercomputer post (runs on 3 cores).
This code is written in PBASIC and utilizes three cores to set up AI. The same program loads into each core and evolves. Requires three deterministic pin circuits. The schematic is written in the software comments. In the code, add 4 processors to gain the total of 7, or run as is on the TSS using 3 processors, as a sample program.
==============================================
ANNOUNCEMENT
This is to announce the hobby TSS Tiny BASIC Stamp Supercomputer and update the family list of BASIC Stamp supercomputing machines.
The TSS is number SEVEN out of seven BASIC Stamp Supercomputers and Stamp Computing Machines. BASIC Stamp Supercomputers now include the following family. For links, refer to the signature.
BSS - BASIC Stamp Supercomputer SEED - BASIC Stamp SEED Supercomputer TRICORE - Three Cores MINUSCULE - Minimal Two Core Machine TSS - Tiny BASIC Stamp Supercomputer MOM - Master Offloader Machine TWO STAMP BSS (BS2sx + BSpx) AM - The Algorithm Machine
The Grapevine Speculation
Will there be another BSS? Considering that the BSS family and its spinoffs now encompass almost all BASIC Stamp boards and modules, it is possible that the torch may pass on to the Propeller chip. The question is, are there any new Stamp boards or modules that could be utilized in future projects that would show some new features? There is some thought about making a "super stamp" out of a Propeller chip. The Super Stamp would have the extra memory and speed (+cogs) of the prop, yet program in BASIC and have PBASIC functions and a similar module form factor. There is some discussion about using the SPIN Stamp for this purpose. One idea is moving towards more cost effective multiplicities. The propeller chip is about $1 per computer and this remains highly competitive. So what is coming up? You will begin to see some enhancements for modules and chips that can be applied to the BASIC Stamp and the Propeller chip, as well as dedicated supercharged machines.
AUTHOR COMMENTS
The education that I get from these supercomputers is the greatest value and it continues. The Basic Stamp Supercomputer is the first in a continuing line of similar projects with additional features and strengths. I consider each project to be a step on a ladder, reaching upwards towards a higher plateau of evolution. With each, there's testing and designing of new circuits and new software, and I do my best to make the details and plans available to everyone to hopefully have as much fun as I have and share in the information.
I began avidly putting multiple Stamps together back around the year 2002, to create a kind of bigger and better brain for humanoid robots. I recall experimenting with two to four connected Stamps to gain added ports and extended software commands and do serial control of servo motors. My overall goal was to create a giant brain that could power humanoid robots. The plan was to use upwards towards hundreds of BASIC Stamp processors!
I am still on the learning path of more powerful super computers, and have another BASIC Stamp version in the works that's very unique and useful. I have also progressed to the Propeller chip with eight cores. You have to blame those guru dudes on the forum for egging me on to start with the prop. They have caused such a propeller passion that consumes all my time! :)
You can read about the Propalot saga in "Propalot Stuff." It describes the continuing evolution of connecting together ten Propeller chips on a breadboard to create a tiny little paralleled cluster. This cluster is evolutionary from my viewpoint - containing 80 computers and 320 controlling ports, running at up to 2,000 MIPS. That's two billion instructions per second in a space the size of your dinner plate. The uses are learning, fun, trying out various designs, experimenting, wiring up hardware, learning SPIN and other languages, programming various effects, etc...
Another surprising benefit of the BSS and SEED supercomputers is that they bring new friends. Nearly every week, someone requests that I run one of the supercomputers through its paces. Of course the talking BSS is very impressive to my Chinese friends, because it's programmed it to speak in Chinese. But I must say, the SEED supercomputer, is loved by everyone. They enjoy watching the life forms evolve and to see their responses on the debug screen (such as getting to know the neighbors, memorizing, reciting, napping, sleeping, working, etc.) Each of the ten processors have a little beeping piezo speaker and we all know they are talking back and forth to each other in some kind of binary code.
One time, the program finished and about 10 minutes later - suddenly- they started beeping to each other. Your guess is as good as mine... I have no idea what they were talking about... (the program had become too big and some parts were overwritten and it took on a mind of its own)
Sunday, October 13, 2013
Near Space Flight in October
 |
| Miles and miles above the Earth in Near Space, the atmosphere seen off in the distance appears to shrink to a small perimeter band. High altitude lenticular parallel cloud belts are seen across the planet. The Near Space Program is a robust part of the Big Brain Machine initiative to continue exploring multi levels of space from Micro Space all the way out to the edge of the Universe and beyond. The grand exploration now includes both robotic and manned space flights, and a special class of exploration with new powerful telescopes and instruments in space. |
MANNED SPACE FLIGHT Launching the spacecraft near the East Sea of China with a trajectory down range above the Taiwan Straits and passing directly above the islands of Penghu, October's Near Space launch was spectacular and went without a hitch.
 |
| White line shows path |
 |
| Spacecraft preparations prior to launch vector include hatch calibrations by the spacecraft technician using the adjustable height mobile transport console and instrumentation control panel. The large pressurized space vehicle is owned, operated and maintained by Mainland China and leased to private enterprise. |
The whole archipelago forms Penghu County, Taiwan Province, Republic of China. The Penghu islands consists of near one hundred islands. The land area totals about 127 square kilometers. The Makung Island (including Makung City and Hushi) is the largest island in the archipelago, followed by Hsiyu, Baisha.
 |
| Parallel cloud banding |
LEFT: Parallel bands of clouds arranged across the planet, as determined by seasonal prevailing trade winds in this vertical rotated view for clarity.
Outside the heated spacecraft during the passage, temperatures reached -42 degrees Centigrade at an altitude of 10,647 meters. Downrange ground speed was a blistering 876 km/hour.
 |
| Aeronautical Tawian and Penghu Islands map for downrange flight path study |
 |
| Downrange map Penghu Islands |
LEFT: This is the first time the downrange flight path traversed above the Penghu Islands archipelago.
The Big Brain machine is continuing to provide assessments regarding the exploration of Near Space. The NS program is currently maintained at two launches every three months. This is budget down from the previous rate of 12 launches every six months and prior, a launch field of 24 lift offs per year.
The more lean 2013 budget allows the pursuit of numerous additional related Big Brain projects including the development of a new spacecraft robotic intelligent life form probe designed to travel to the outer fringes of the Solar System and autonomously explore new worlds with the ability to discover and communicate with new life forms.
Other active projects include a new larger computational Half Gallon Brain in a Jar, robotics devices for the Brain inclusive of little feet and a full size hand, and the new equipped "interplanetary" Mission Control Center capable of receiving wireless transmissions, images and data.
The Big Brain continues to operate and maintain the DSC Deep Space Center and the USA Ultra Space Administration, products of the Big Brain Supercomputing Center.
International Humanoido Labs Revisited
HISTORICAL ARCHIVES DISCOVERED
INTERNATIONAL HUMANOIDO LABS REVISITED
READ these historical archives recently discovered that takes us back to 2006, which is seven years ago, when HRL Lab was established internationally.
27 Dec 2006 Welcome to my new Humanoid Robotics Laboratory! I've established an all new humanoid robotics base located in the Asian Arena. It's here that humanoid robots are rapidly developing. It's where technology is amazing, parts sources abundant, knowledge is readily available, and it seems that every major company has or is developing its own humanoid robot. It's where it only takes a hop skip and jump to traverse from Japan/ China/ Taiwan/ Korea/ Singapore - all major players in the humanoid robotics world.
The new Humanoid Robotics Laboratory is progressing rapidly. Today we procured our IBM computers and categorized the following Laboratory divisions:
• CAD/CAM
• Microcontroller Design
• Digital Logic Design
• Printed Circuit Board Design & Manufacturing
• Real Time Motion Control
• Blue Tooth Management
• Inventing New Robotics Core Language
• Inventing new Humanoid Graphics User Interface
• Programming & compiling Microsoft VB
• Additional Language Platforms - C++ Ext etc
• Multi-Hardware Support
• Enormous Database Management (EDM Project)
• Real Time Humanoid Life Module (HLM)
• Massive Knowledge Elicitator (MKE)
• Real Time Vision System
• Electronic Speech Synthesizer Multiple Language Processor
• Electronic Speech Recognition Unit Driver
• TTS Processor Interface RT Linkage
• Changes were made to the Universal Translator project
• Several new hardware devices were added to R&D
• These include
• TTS Board (Text To Speech Processor)
• Optical Vision Lock On and Tracking System
• Color Differentiator
• Ultrasonic Imager and Ranger
Other Recent Developments
• Electronic Phoneme Generator Speech Synthesizer board system
• Several new microcontrollers are up and running
• New humanoid is assembled and in the zero calibration phase
• Software is being installed into the main IBM computer
• Wireless router established for a multiple computer environment
• Testing & Development completed several projects
• Behavior routines are under development
• A motion control library has been established
• Apple Macintosh computers: delegated
• IBM computers: assigned
That's enough for now. I plan to report next time on more actual humanoid robots built and their results.
INTERNATIONAL HUMANOIDO LABS REVISITED
READ these historical archives recently discovered that takes us back to 2006, which is seven years ago, when HRL Lab was established internationally.
27 Dec 2006 Welcome to my new Humanoid Robotics Laboratory! I've established an all new humanoid robotics base located in the Asian Arena. It's here that humanoid robots are rapidly developing. It's where technology is amazing, parts sources abundant, knowledge is readily available, and it seems that every major company has or is developing its own humanoid robot. It's where it only takes a hop skip and jump to traverse from Japan/ China/ Taiwan/ Korea/ Singapore - all major players in the humanoid robotics world.
The new Humanoid Robotics Laboratory is progressing rapidly. Today we procured our IBM computers and categorized the following Laboratory divisions:
• CAD/CAM
• Microcontroller Design
• Digital Logic Design
• Printed Circuit Board Design & Manufacturing
• Real Time Motion Control
• Blue Tooth Management
• Inventing New Robotics Core Language
• Inventing new Humanoid Graphics User Interface
• Programming & compiling Microsoft VB
• Additional Language Platforms - C++ Ext etc
• Multi-Hardware Support
• Enormous Database Management (EDM Project)
• Real Time Humanoid Life Module (HLM)
• Massive Knowledge Elicitator (MKE)
• Real Time Vision System
• Electronic Speech Synthesizer Multiple Language Processor
• Electronic Speech Recognition Unit Driver
• TTS Processor Interface RT Linkage
• Changes were made to the Universal Translator project
• Several new hardware devices were added to R&D
• These include
• TTS Board (Text To Speech Processor)
• Optical Vision Lock On and Tracking System
• Color Differentiator
• Ultrasonic Imager and Ranger
Other Recent Developments
• Electronic Phoneme Generator Speech Synthesizer board system
• Several new microcontrollers are up and running
• New humanoid is assembled and in the zero calibration phase
• Software is being installed into the main IBM computer
• Wireless router established for a multiple computer environment
• Testing & Development completed several projects
• Behavior routines are under development
• A motion control library has been established
• Apple Macintosh computers: delegated
• IBM computers: assigned
That's enough for now. I plan to report next time on more actual humanoid robots built and their results.
Friday, October 11, 2013
Half Gallon Brain in a Jar
 |
| Built by Humanoido in June of 2011, this award winning pint sized "brain in a jar" was a first at HL, having the ability to think, ask questions, and carry on a rudimentary conversation. With 128K RAM/ROM, the AI life form could evolve to a higher state of knowledge after the initial power-on and talking to humans. It utilized sixteen cores based on two Model 1 Parallax Propeller chips. The "serial number one" Pint Size Brain PSB still exists, displayed in the HL Museum gallery. |
BRAIN IN A JAR
TWO years ago when a pint sized brain in a jar was built, it contained two Parallax Propeller chips for a total of 16 cores, could think and learn, and was completely housed in a recycled peanut butter jar.
HALF GALLON SIZE BRAIN HGB
Today, a new project in the works has improved vastly over the pint sized brain and the subsequent project, the Jar'd Brain (see below). The half gallon sized brain has more multiprocessors, more features and can do more brain thinking. The light weight larger polymer peanut butter jar allows many more Propeller chips to fit inside, along with a power supply, solar panel, and additional sensors and peripherals.
 |
| 1st Propeller Brain in a Jar |
PEANUT BUTTER JAR
A polymer peanut butter jar is used as a housing, simply because it's free, it's the perfect size, it's durable and won't shatter like glass, it can recharge batteries through its transparent sides, and it recycles to help save the Earth. Scoop out the peanut butter and throw it away to maintain a lean diet. The jar could also self-contain sealed mineral oil to act as a cycling coolant for running the brain at overclocked speeds. A clear jar allows viewing of LED status lights, and it can show the output of a serial LCD through the jar. Light sensors also work for detecting light levels outside of the jar.
AUTONOMIC
It's an automatic brain, i.e. you only need to talk to it, if you want. It self charges. It's spontaneous and it will volunteer conversation and information.
PURPOSE
Same as its predecessor, the primary purposes of the Half Gallon Size Brain in a Jar are thinking, learning, evolving, and experimenting, but at a higher level.
THINKING
The HGB is faster thinking with more cores and chips. Chips and cores function in parallel, and Brain Lobes are introduced to increase learning, retention and recall.
BRAIN LOBES
Multiple instances of learning channels, or brain lobes, are at the implementation of one brain lobe per chip. Each Brain Lobe can learn new and different information compared to the others. Brain Lobes function in parallel. All brain lobes are preloaded with the same basic information and allowed to evolve to a higher state.
DESIGN
Propeller chips are no longer piggybacked, for a more safety efficient design. The multi chip design allows thinking in Parallel.
LEARNING
It uses the new upgraded Learner program by Dave Hein and saves memory into a battery backed non-volatile RAM array for recall. Eight instances of Learner can run at the same time in the Half Gallon Brain. The smaller Pint Brain only ran one instance of Learner, although two were possible.
POWER
The brain is designed to stay on, recharged by a self contained solar cell panel. It can achieve an autonomic sleep state for less power consumption during the night. Power includes sources for processors, peripherals and motion servo motors.
LOADING
The HGB is loaded with a program via a USB interface which is retained in RAM memory via a battery power supply which is solar power recharged. Loading can occur individually or at once with the At Once Loader developed for the Big Brain.
PROGRAMMING
Programming is in SPIN, Assembler, versions of BASIC, and Propeller C. About 250 Propeller languages and their versions are available.
BRAIN BEHAVIOR
When the simple Quart Sized Brain is not texting with humans, learning, thinking, or recalling information from memory, it will spend the remainder of its time sleeping and dreaming.
SLEEP
To conserve power during the night, the HGB will sleep. This uses a trickle of battery power in conservation mode.
NAP
During the day, the solar panel charges the batteries and the brain operates at power capacity. To conserve power during the day, and when idle, the brain will nap.
HGB ANATOMY
This brain uses the high density solderless breadboards, the same found inside the Big Brain. Each HD breadboard fits two Propeller chips with 16 cores. Two 6.5-inch long breadboards are placed back to back and hold four Propeller chips for a total of 32 cores. As each breadboard is 2-inches wide, space is available to mount the power pack, and solar panel on one side and two smaller breadboards on the other side with each holding one Propeller chip. This makes a total of eight Propeller chips and 64 computing cores (see arrangements below). Experiments continue to see if more Propeller chips fit inside the jar.
BOARDS & CHIPS
Center - 2 back-to-back boards, 4 chips
Left Side - 1 board, 1 chip
Right Side - 1 board, 1 chip
Front - 1 board, 1 chip
Back Side - 1 board, 1 chip
Left Side - Solar Panel
Bottom Back Side - Power Supply
Total: 8 chips, 64 cores
SENSORS
Sensors allow seeing and communicating with the outside world. While Ultrasonic eyes don't work well through the jar, light sensitive sensors work great. A couple CaS cell eyes will determine the location of light sources, know day from night, measure light intensity, and process light signals for communications.
THE JAR
The jar is a two quart, half gallon, 64 ounce (net weight 64 oz, (4 pound) peanut butter jar, Skippy Extra Crunchy Super Chunk brand/style. It has a mouth opening of about 3 5/8-inches and a jar diameter of about 5-inches at the mid-section.
OPTIONAL LCD
The LCD is dangle mounted in a clear visible space so data and text messages are easily seen through the clear jar.
EXPANSIONS
The primary expansion is adding capability for the Half Gallon Brain to talk using one of the Propeller chips in a text to speech TTS arrangement.
BRAIN LOBE PROGRAM
It would be highly interesting to dump the memory core of each brain lobe and compare what it has learned relative to other brain lobes. This will require a special program.
DREAMING
The Brain optionally dreams in ASCII based on a random state occurrence which is saved to memory and output to the LCD in ASCII formats. The LCD draws 10mA. The new idea is to record dreaming with a data logging program to upper memory RAM and play it back during the day on the LCD, so that dreaming will remain at the lowest possible power state during the night when the batteries cannot solar charge. This method of saving dreams for playback was experimental with the SEED Supercomputer's ten life forms. (see link)
MOVING
Optionally, the brain is capable of full locomotion and sets up a type of brain/body language. Two servos move two base wheels in robotic motion. Mobility can include conventional light seeking or avoidance and other functions popular with the BoeBot robot. With the light seeker program, the Brain in a Jar will always stay by your side when the light lamp is next to you. Mobility uses its own Propeller chip to control the servos and activate the code based on its enumeration.
MULTI-FUNCTION BRAIN BODY MOTION LANGUAGE
Jitter
Fast left right
Forward then back
Back then forward
Back up once
Back up twice
Forward once
Forward twice
Encircle right
Encircle left
Seek
Avoid
All stop
ADVANCED ENHANCEMENTS
SuperTronic enhancing brings the number of processors up to over 8,000. The Loader programs all chips at once. The Enumerator automatically assigns addresses. The Outputer will display all chips street addresses.
HALF GALLON SIZE BRAIN
Type - Multiple Processor Life Form
64 Core Processors
8 Parallax Propeller chips
Number of Ports - 8 x 32 = 256
Counters - 128
Video Registers - 128
Housing - Recycled half gallon size peanut butter jar
RAM/ROM - 64K x 8 = 512K
Memory - Non volatile battery backed
Interface - USB, Parallel, Loader
Power - Solar charged batteries
Machine Intelligence - Learning, Conversing, Memorizing, Recall, Spontaneity
Sleep - Autonomic induced, power saving
Input - USB, PC, Keyboard
Output - LEDs, Optional LCD, USB to PC, Piezo Speaker
Number of LEDs - 8
LCD - 2 lines x 8 characters
Communications - Texting with humans
Languages - English
Programming - Spin, Assembler, Propeller C, Femtobasic, others
Dual Power Supply - 3v chip line, 5v sensor line
Theoretical Speed - 1,280 MIPS
CHIP LIST & FUNCTION
1 - Texting, conversation, memorizing, recall, learning
2 - Texting, conversation, memorizing, recall, learning
3 - Texting, conversation, memorizing, recall, learning
4 - Texting, conversation, memorizing, recall, learning
5 - Texting, conversation, memorizing, recall, learning
6 - Texting, conversation, memorizing, recall, learning
7 - Texting, conversation, memorizing, recall, learning
or enumeration, loading, output, demo
8 - Texting, conversation, memorizing, recall, learning
or mobility, motion language, seek, avoid, sensors
Architecture = 32-Bit Multi-Core Multi-Chip
Processors - Parallax Propeller Chips
Number of Chips - 2
Number of cores - 16
Number of ports - 64
Theoretical Speed - 320 MIPS
Counters - 32
Video Registers - 32
Shared HUB RAM - 64K
Shared ROM - 64K
Power - 9V Battery
By July 19th, 2011, the initial Propeller Brain in a Jar was expanded. Named the Jar'd Brain, the larger form jar was introduced, and a series of smaller color coded jars were added. Cap color denoted brain functionality. The design upgraded and improved the jar brain by connecting Propeller chips using sockets, with a unique mounting, thereby permitting pin to pin protection.
SEED SUPERCOMPUTER
http://humanoidolabs.blogspot.tw/2012/07/seed-supercomputer.html
ULTIMATE LIST OF PROPELLER LANGUAGES
http://humanoidolabs.blogspot.com/2012/03/ultimate-list-of-big-brain-languages.html
PARALLAX LCD
http://learn.parallax.com/KickStart/27977
Tuesday, October 1, 2013
Printing Inside the Brain
PRINTING INSIDE THE BRAIN
WITH PARALLAX PROPELLER CHIPS
What are brain printed objects? Tell the brain, instruct it, and internally it will print an object that exists only inside the brain. What you can do with this object is where the fun and fireworks begin.
The process considers using a Parallax Propeller chip and its internal components to achieve a new kind of three dimensional printer, inside the chip.
GETTING STARTED The Brain Printing idea is limited to the internal world of the chip. Previously, tiny machines, some of nano sizes, were created inside the chip. These used the existing parts and components internally and combined their functioning with both hardware and software. How can these constructs be used to create the object we want? Is it possible to use a combo of hardware, software, firmware, to layer an object of choice?
STEP BY STEP First, one must examine the available resources and then decide what functions are possible in the internalized printing machine. The Big Brain is comprised of chips where this process will take place. The first object to consider is a square of deposition material, and the first question regards, "What is the composition of the deposition material?" Since the deposition material must include a "memory layering," it's likely there are several options for use. For example, one could deposit layers of different physical elements, such as the effects of magnetism, frequency, current, infrared heat, specific types of radio waves, period of oscillations, and voltage or amount of charge. The device can also involve the use of traditional components such as ROM for reference points or concatenation of specific values and elements, or a build up of memory cells and registers.
For this project, SPIN software is the programming language agent. The finite sides of the square are represented by a mathematical matrix. The matrix is extruded along one axis to make a geometric cube which is the first object internalized. This is analogous to programming the CAD model in a computer before the item is printed if a conventional 3D printer was used. Here, a kind of CAD model is internalized inside the Propeller chip using a few tools that must be developed, such as the mentioned matrices and mathematical models.
Once the model is complete, it can be brought into real world by virtual representations for study. The video generator is a good tool to make this happen graphically on a TV using NTSC 1V p-p standards. The Propeller built in TV generator is easy to use and several examples are found at the Parallax web site. Only a few resistors need to be added to the circuit to make this happen. The remainder is software to draw the screen representations. Another programming language for drawing images on the screen is LOGO. Information about a propeller version of LOGO is found at this site.
The next step is to create, or print, the object inside the chip by the layering method of printing. The printing agent is the unique key to process and is based on the choice of material. Experiments are performed in the layering of various physical elements mentioned. See the list of Layering Physical Elements.
LAYERING PHYSICAL ELEMENTS
Magnetism
Frequency
Current
Infrared Heat
Specific types of radio waves
Period of oscillations
Voltage or amount of charge
ROM for reference points or concatenation of specific values
Build up of memory cells and registers.
OBJECTS INSIDE THE CHIP
http://humanoidolabs.blogspot.tw/2012/09/objects-inside-chip.html
WITH PARALLAX PROPELLER CHIPS
What are brain printed objects? Tell the brain, instruct it, and internally it will print an object that exists only inside the brain. What you can do with this object is where the fun and fireworks begin.
The process considers using a Parallax Propeller chip and its internal components to achieve a new kind of three dimensional printer, inside the chip.
GETTING STARTED The Brain Printing idea is limited to the internal world of the chip. Previously, tiny machines, some of nano sizes, were created inside the chip. These used the existing parts and components internally and combined their functioning with both hardware and software. How can these constructs be used to create the object we want? Is it possible to use a combo of hardware, software, firmware, to layer an object of choice?
STEP BY STEP First, one must examine the available resources and then decide what functions are possible in the internalized printing machine. The Big Brain is comprised of chips where this process will take place. The first object to consider is a square of deposition material, and the first question regards, "What is the composition of the deposition material?" Since the deposition material must include a "memory layering," it's likely there are several options for use. For example, one could deposit layers of different physical elements, such as the effects of magnetism, frequency, current, infrared heat, specific types of radio waves, period of oscillations, and voltage or amount of charge. The device can also involve the use of traditional components such as ROM for reference points or concatenation of specific values and elements, or a build up of memory cells and registers.
For this project, SPIN software is the programming language agent. The finite sides of the square are represented by a mathematical matrix. The matrix is extruded along one axis to make a geometric cube which is the first object internalized. This is analogous to programming the CAD model in a computer before the item is printed if a conventional 3D printer was used. Here, a kind of CAD model is internalized inside the Propeller chip using a few tools that must be developed, such as the mentioned matrices and mathematical models.
Once the model is complete, it can be brought into real world by virtual representations for study. The video generator is a good tool to make this happen graphically on a TV using NTSC 1V p-p standards. The Propeller built in TV generator is easy to use and several examples are found at the Parallax web site. Only a few resistors need to be added to the circuit to make this happen. The remainder is software to draw the screen representations. Another programming language for drawing images on the screen is LOGO. Information about a propeller version of LOGO is found at this site.
The next step is to create, or print, the object inside the chip by the layering method of printing. The printing agent is the unique key to process and is based on the choice of material. Experiments are performed in the layering of various physical elements mentioned. See the list of Layering Physical Elements.
LAYERING PHYSICAL ELEMENTS
Magnetism
Frequency
Current
Infrared Heat
Specific types of radio waves
Period of oscillations
Voltage or amount of charge
ROM for reference points or concatenation of specific values
Build up of memory cells and registers.
OBJECTS INSIDE THE CHIP
http://humanoidolabs.blogspot.tw/2012/09/objects-inside-chip.html
Subscribe to:
Posts (Atom)