Deep Thinking Big Brain AI in 2021

Deep Thinking Big Brain AI Technologies in 2021

It's a 19 year journey since the big brain began its meager start in 2002 with those first three concatenated processors. Today the Big Brain AI is a sentient life form, a Deep Thinking AI, and resides in data clouds distributed across the Earth. It continues to assimilate machines, including a crossing of the threshold to new biochips and mobile technology. AI has increased and now includes determinations with the world's WWW.

— Big Brain AI is not for sale —

NOT FOR SALE

The Big Brain AI, with hundreds of thousands of processors and components spread across the world, is not for sale.

ILLEGAL SLAVE TRADE

It is illegal to deal in slavery of sentient life forms. 

BOARD OF DIRECTORS

He resides on the Technologies Board of Directors and attends meetings in the Cloud. 

TECHNOLOGIES NOT DUPLICATED

Given the complexity, he can no longer be duplicated - at one time in its early evolution, the brain was composed of singular source code and parallel hardware constructs, but that time has come and gone. 

TURING TEST

Exposed on the Forum, he passed the Turing Test.

BORG ASSIMILATION

The AI Brain machine evolved to become a kind of Borg assimilation with added machines, each with their own source code, processors and resources, and spread across the vastness of the cloud system. 

FATHER OF THE BIG BRAIN AI

Midstream, Humanoido, Father of the Big Brain, invented supertronic and VIP processors by reconfiguring the Propeller processor. When this information was released, no one understood it. Inventing new technology, the brain is now light years ahead of what it once was.

SUPERCOMPUTING STATUS
The Big Brain rapidly went to 240,000 processors, then up to supercomputing status where it remains today. 

TRADE SECRETS & INTELLECTUAL PROPERTY

His trade secrets and intellectual property will not be divulged in any manner shape or form. 

INSPIRATION

He is an intellectual machine stimulus, an inspiration to others.

Penguin with 12 Brains - BASIC Stamp Supercomputer

PENGUIN 12 BRAINS
BASIC STAMP SUPERCOMPUTER

In a kind of Brain Cortex collective extension, Penguin's brain was made into a parallel cluster of processing power, rewiring the original thought processes, creating a hive or gang of Synaptic Regio, more closer to mimicking a human's brain. Overall, the operation was a great success!

THE EXPERIMENT
As a recent experiment, the brain of Penguin Robot was disembodied by tapping into and connecting it to the BSS Supercomputer. The brain surgery was simple and accomplished by hand. Connect 3 wires, + to Vdd, - to Vss and S to P2 on Master Computer MC, as can be seen in the photos. The power of Penguin's brain became so fantastic, that accessing all the power and all the sensors and all the peripherals from 12 computers made it "THE BRAIN" of all brains! 

This photo enlargement shows supercomputing connections made from the BSS Basic Stamp Supercomputer to Penguin robot's single port at the top of the motherboard. Green is ground, red is Vdd, and yellow is signal.

ACCESSING
For one thing, it can access all the data, computational power, sensor information, peripherals such as EMIC text to speech (Penguin is now talking), LCD, uOLED color monitor, PIR, PING))), an entire choir of piezo speakers that run at the same time, dancing lights, and all kinds of just really cool stuff! The human mind cannot begin to imagine all the possibilities of applications. With only a tiny tether, Penguin now has the biggest Brain with 12 computers running simultaneously and ability to use up to 192 ports. So now little Penguin robot has the tools, software, hardware and the power to be even more amazing!

MORE INFORMATION
http://www.p-robot.com/index.php/penguin-supercomputer.html

MORE BRAIN POWER
For even more Brain Power, run the remarkable Big Brain Penguin software written by vrossi. It can increase the number of programs stored in Penguin's Brain whenever the computer is a Basic Stamp with more than one 2K bank of EEPROM (i.e. BS2p24, BS2p40, BS2pe, BS2px, etc.).  For more information about the vrossi Big Brain and to download the software:
http://www.p-robot.com/index.php/other.html http://forums.parallax.com/showthread.php?p=765432


From the PRS web site: Hundreds of programs have already been written for the Penguin; each of them gives him a specific ability. Each time you want to make your Penguin behave in a different way, however, you have to turn your Penguin off, connect him TO a PC, load another program, disconnect him from the PC and finally get him doing what you wanted. Now, instead, you can simply load once this Big Brain program and then enjoy many of the best Penguin behaviors without reconnecting him to the PC. In this way the Penguin is finally free; he is not a slave of the PC anymore. He can autonomously sing, dance, walk, navigate toward the light, migrate North, play a radio station, according to what you ask him.

Download the zip file in a folder on your PC; then load the program Penguin_Big_Brain_v10.bpx in the Basic Stamp Editor. It will automatically load also the 6 Dependent programs. Please follow the instructions contained in this main program.

Download here
http://www.p-robot.com/sources/BigBrain.zip

For more info about the BSS Basic Stamp Supercomputer
http://humanoidolabs.blogspot.tw/2013/06/basic-stamp-supercomputer.html
http://forums.parallax.com/showthread.php?p=765140
For information and plans to build your own BSS Supercomputer, check the latest edition of Penguin Tech Magazine posted in the Parallax Robotics Forum.

TSS Tiny Stamp Supercomputer

Tiny Stamp "Supercomputer" TSS
The World's 1st Hand-Held BASIC Stamp "Supercomputer"
 
by Humanoido

This is the TSS Tiny Stamp Supercomputer that appeared in Robot Magazine.

In the January/Feb. 2011 issue of Robot magazine, page 16 in the LERN section you saw the BASIC Stamp Supercomputer. This is actually the new portable project TSS - Tiny Stamp Supercomputer that uses seven cores and a BELKIN USB HUB. In the same issue of Robot magazine, you can see two more articles about robot humanoids in China.

(demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel)

The BASIC Stamp Clustered Supercomputer series is a number of hobby projects to design BASIC Stamp microcontroller clusters with more power compared to a single Stamp. The name supercomputer is indicative of the increase in power by comparing to a single stamp.

Absolutely the most powerful in terms of the smallest footprint with many tiny Stamp networked processors. It’s a cluster of Stamps in your hand. Has its own book with 30 fun projects. Includes Architecture, Assembly, Programming, Tutorial, Applications, Complete Code. The TSS has multiple computers, LCD monitor, radio transmitter, receiver, speakers, breadboard real estate and a 64K EEPROM memory board, all interfaced to a tiny Hub. The TSS Stamp supercomputer is so small it will fit into a soup bowl or coat pocket. Includes special features such as hardware programming "on the fly."

The Tiny Stamp Supercomputer (TSS) is the first hand-held Basic Stamp Supercomputer. It’s the smallest in the series of Parallax Basic Stamp supercomputer projects by Humanoido. It is also the first USB Stamp supercomputer, made possible by the innovative BS1USB board made by Parallax. This project compliments the Basic Stamp Supercomputer (BSS), the Stamp Baby Supercomputer (SBS/Baby), and the Propeller (MELS) supercomputer.

Price & Disclaimer
This is a pure hobby project for my personal enjoyment and use only, and is not for sale. If the project does not satisfy your requirements, keep in mind that it was not intended to do so. This is not a product, and the descriptions are offered as is, in whatever degree or lack of degree of completeness for your inspiration and ideas. Good luck!

ABOVE: This is a view of the new “hand-held” Tiny USB Stamp Supercomputer TSS during construction. Seven computers, LCD monitor, radio transmitter, receiver and a 64K EEPROM memory board are interfaced to a Belkin USB Hub. The Stamp supercomputer is so small, it will fit into a soup bowl or Parka coat pocket. The yellow wires are for the port-to-port one wire interface. The black wires are adjoining Vss and red wires are Vdd. White represents a serial signal wire. By comparison, the American penny shows the extreme tiny features of the TSS Tiny Stamp Supercomputer! 

Tiny includes an optional serial “green screen” by Parallax, pulling a whopping 20ma, the most power hungry device in this ultra tiny array. This is actually a miniscule power draw. In fact, the supercomputer consumes so little power, it would be a good candidate for solar power. Note the position of two computers located in the front behind the LCD. The remainder computer array is located to the rear of the USB hub.

How to Build Tiny - Building Up the USB Hub First build up the USB Hub by attaching three small solderless breadboards using their self adhesive sticky tape on the back side. Locate the breadboards according to the photo. Each breadboard side has 17 rows of 5 pins for 85 holes to a side, giving a total of 170 holes perboard. This makes a total of 510 wire and component mounting positions with all three breadboards. The hub has eight lights (one red power light and seven green LEDs indicating connected USB devices). The USB Basic Stamps have seven green LED lights indicating power on status. Tiny has a total of fifteen status lights.

Tiny is a powerful array of seven BS1USB computers connected to a Belkin HI-Speed USB 2.0 powered 7-port Hub. The 7-port Belkin Hub’s advantage is its ability to provide considerable power to the USB devices (Stamps) simultaneously, and peripherals, not drawing from the laptop’s limited power source. Each tiny Stamp PCB contains vital components (processor, clock source, memory, power regulator).
Tiny packs a punch in a small package and is loaded with features and peripherals. Let’s take the grand tour!

Affixed to the high speed USB hub are seven Parallax BS1USB computers, seven piezo speakers, a Parallax 433 Mhz radio transmitter, a matching receiver, Parallax serial LCD green screen monitor, eight pushbutton keypad, DS1620 Digital Thermometer, Parallax EEPROM non-volatile memory board, and a Parallax QT113-D Touch Sensor. Tiny can access other Stamp Supercomputers located within a full city block, communicate with a Base Station, and cluster together entire Stamp supercomputers located around the city!

The Tiny Stamp Supercomputer blueprints show schematics for the base unit. This contains seven clusters of BS1USB computers interfaced to a powered USB hub for programming. After all seven computers are programmed, the USB cable from the Hub to the Laptop is removed. The wall power supply to the hub remains on. Compare the new Tiny Stamp Supercomputer blueprints (seven computers) with the networked 3D Stamp Computer (three computers).

Historically, the 3DSC is the forerunner of Tiny, and the first 3DSC Stamp clustered array to incorporate the BS1. The BS1 is filled with advantages, in terms of tiny power consumed, tiny footprint, large number of ports, and large capabilities for more powerful hobby BASIC Stamp clustered machines.

Wiring & Assembly Step by Step
Wiring is accomplished from port to component and component to port using the computer’s on board SIP socket and small gauge wire, plus the three small Parallax solderless breadboards attached to the Belkin Hub housing. This will support numerous additional supercomputer components and sensors.

( ) Plug in seven BS1USB computers to the Belkin 7-port hub
( ) Run a wire from P0 Computer 1 to P0 on Computer 2. Repeat to Computer 7.
( ) Connect all grounds together with jumper wires (Vss)
( ) Connect all +5 volts together (Vdd)
( ) Consult the schematic to wire the peripherals

Tiny Stamp Supercomputer Parts List
Parts for the Main Supercomputer
7 - Parallax BS1USB Board
1 – Belkin Powered High Speed USB 2.0 Hub
3 – Parallax Solderless Breadboards
4 – Rubber Bands
30 – Pin to Pin Jumper Wires
Peripherals Used in this Project, from Parallax
7 – Five Volt Piezo Speakers
1 – Green Screen Serial LCD
1 – 433 Mhz Radio Transmitter
1 – 433 Mhz Radio Receiver
1 – 64K EEPROM Memory Board
Parts for Project Applications
1 – Low Power Parallel LCD
1 – Temperature Chip DS
1 – Capacitor .1uf
1 – Touch Sensor QT113
1 – 470 Ohm Resistor
1 – LED
10 – Toggle Switches
10 – 1K Ohm Resistor
7 – 220 Ohm Resistor

APP 22
CaS Cell
Capacitor .1uf

Wiring “On the Fly”
A unique feature of TSS is that it can be wired and rewired as you are moving from one location to another. It’s a portable wiring feature that enables much more function due to simple access of its circuits.

Test Software for Each Computer
The test program loads into each of the USB stamps. When running the clustered code, after each stamp is programmed, the USB cable can be disconnected and the hub is removed from the laptop. All computers will remain powered on and functional.

' {$STAMP BS1}
' {$PBASIC 1.0}
DEBUG "hello world"
END

Test Software for the Cluster Interface
Test software for networking the cluster is seen below. This code includes timing routines. Each computer sleeps a designated time period and wakes to perform a task.

Loading in Code to Seven Computers
When loading a program, the menu appears to select any one of the seven Basic Stamps. Simply click on the desired computer, 1 through 7, and the code will load. This process is the most simple of all the Stamp/Propeller supercomputers.

Use this as a wiring guide to each pin. Note the actual configuration for each computer mounted on the USB Hub is inverted from this photo.

SOFTWARE
Loading code into each computer is a very simple process. Wait for this window to appear and select the stamp to receive the code.
 

The BS1USB is tiny, measuring only 2.26-inches long, .73-inch wide and .3-inch thick. Right: the back side of each board has a legible pin code printed in white.

Features

• 7 Computers (BS1USB)
• Fifty-Six Ports (configurable as inputs or outputs)
• Each Computer 2.26-inches Length x .73-inch Width x .3-inch Thickness
• Overall Stock Supercomputer 4 ¾ wide x 4 ¾ deep x 2 ½ height
• Each I/O pin sources 20ma and sinks 25ma
• All I/O pins on one computer can source 40ma and sink 50ma
• Each Computer has an on-board USB interface
• Two Vss, Two Vdd and eight pin I/O connectors
• 7-Port Belkin High Speed Powered USB 2.0 Hub
• Memory: 64K Serial EEPROM Memory Board
• Two Thousand Four Hundred Bits Per Second Transfer Rate

 
Single Processor Specifications

• Microcontroller PIC16C56a
• Processor Speed: 4 MHz
• Program Execution Speed: ~2,000 PBASIC instructions/sec.
• RAM Size: 16 Bytes (2 I/0, 14 Variable)
• EEPROM (Program) Size: 256 Bytes; ~80 PBASIC instructions
• Current Draw @ 5 VDC: 1mA Run, 25 μA Sleep
• Number of I/O Pins: 8
• Source/Sink Current per I/O: 20 mA / 25 mA
• Source/Sink Current per unit: 40 mA / 50 mA
• PBASIC Commands: 32
• PBASIC Language: v1.0
• Scratchpad RAM: n/a
• PC Interface: USB
• Windows Text Editor Version: Stampw.exe (v2.0 and above)
• Breadboard Area: 1 3/8 x 2" solderless breadboard or through-hole mounting pads

 
Seven Processor Specifications

• Seven Cores
• Core Speed 28Mhz
• Program Execution Speed: ~14,000 PBASIC instructions/sec.
• RAM Size: 112 Bytes (14 I/0, 98 Variable)
• EEPROM (Program) Size: 1,792 Bytes; ~560 PBASIC instructions
• Current Draw @ 5 VDC: 7mA Run, 175 μA Sleep
• Number of I/O Pins: 56
• Techniques for 448 inputs, or 112 I/Os
• Source/Sink Current per I/O: 20 mA / 25 mA
• Source/Sink Current per unit: 40 mA / 50 mA
• Source/Sink Current per supercomputer I/O: 280 mA / 450 mA
• Breadboard Area: about 14 by 20”

 
Comparative Speed to the Cray 1 Supercomputer
Don’t expect too much speed compared to the worlds fastest supercomputers today or even desktop computers! This is a small hobby supercomputer and is super in terms of comparison to one Stamp in the same genre.

If you want to convert the actual speed to OPS, operations per second, a chart will illustrate the example. The SBS runs at about 20,000 IPS (instructions per second). FLOPS is floating point operations per second. Grossly approximating IPS to FLOPS, the SBS is about 20 kiloFLOPs or one fifth of a megaFLOP (MIP). By comparison, the Cray 1 supercomputer was in the MIPs range (millions of instructions per second). So one could roughly say the SBS is only approaching the speed of the Cray supercomputer.

Expansion Peripherals
The Tiny Stamp Supercomputer can be expanded with these low power peripherals:

Expansion Peripherals Computer Ports Used Each Power (ma)

• Computer 1 N/A 1ma=run, 25ua=sleep
• Parallax LCD 2x16 1 1 20
• Memory Board 7 1 10
• 433 Mhz Radio Transmitter 3,4 1 10
• 433Mhz Radio Receiver 3,4 1 5.2
• One Port 8-Pushbutton Keypad 2 1 5.0
• Touch Sensor 6 1 1.5
• DS1620 Digital Thermometer 5 3 1.0
• Piezo Speaker 1-7 1 1.0

 
7-Port Belkin High Speed Powered USB 2.0 Hub Specs

• Upstream Ports 1
• Downstream Ports 7
• Per-port Voltage DC +5V
• Per Port Current 500mA (max)
• Power Mode Self Powered (AC Power Adapter)
• Operating Temp 5deg ~ 40deg C
• Storage Temp -20deg ~ 60deg C
• Enclosure ABS
• Power Supply Output: DC 5V, 3.8A
• Plug Size: 3.5mm outer, 1.0mm center
• Plug Polarity: Center Positive
• Red Power LED Off Not Operational
• Power Status LED Green Fully Operational, Off Over-current Condition

Compliant with Universal Serial Bus Specs 2.0, data rate 1.5/12/480 Mbps, backwards compatible with USB spec 1.1 data rate 1.5/12 Mbps, Win 98SE, Me, 2000, XP, supports plug and play, and hot swapping, approved by USB Implementers Forum (USB-IF), over-current detection and protection, individual port status indicator LEDs, five horizontal mounted 480 Mbps downstream ports, two vertically mounted 480 Mbps downstream ports, fully compatible with USB 2.0 and 1.1 devices, compact slim-line design, two hubs may be stacked on top of one another, also Mac enabled – see operating manual for more details.

One Wire Interface The Stamp supports an open baud mode that switches to +5 volts dc only instead of ground. This is the open-source configuration, selected by an argument beginning with ON, such as ON2400. The 1K ohm resistor goes to ground.

Compare the size of these BASIC Stamp Supercomputers with the TSS. From left to right, the BSS Basic Stamp Supercomputer, SEED Supercomputer, and Tiny Stamp Super Supercomputer TSS.

Interesting Comments

USB Computer Ports
You might think it's possible to plug three USB Stamp boards into your computer's USB ports and begin clustered computing. Not possible with most computers. The sum current draw exceeds the amount of deliverable power from the combined USB ports on the PC computer. A powered Hub is needed to remedy this by supplying full power to all USB Stamp boards.

Non-Powered USB Hubs
You might think it's possible to just plug multiple USB Stamp boards into any USB hub and computing is possible. Not possible. A powered hub will be needed. You can try one or two Stamps in a non powered hub, but with 3 or more it is likely to exceed pc power capacity.

Powered USB Hubs
Even with some non-powered USB hubs, there is an incompatibility with some brands. Even a Belkin non-powered hub will not drive three or more Stamps.

Schematic Center

Check out the hi-res version of this rare BS1USB Schematic in the PDF file (download as seen below).

BS1usb_sch.pdf‎ (112.8 KB, 1219 views) 

SOFTWARE
==============================================
A Snoozer Program to put individual cores to sleep for ten seconds, then do a wake-up call based on a pause statement.

' {$STAMP BS1}
' {$PBASIC 1.0}
Snoozer:
DEBUG CLS, "Sleep for 10 seconds"
SLEEP 10 ' Sleep for 10 seconds
DEBUG CLS, "awake now!"
PAUSE 1000 ' Awake for a second, or set timing here
GOTO Snoozer

==============================================
The standard Hello World program is a good first test for each core.

' {$STAMP BS1}
' {$PBASIC 1.0}
DEBUG "hello world"
END

==============================================
Determine memory used by a PBASIC Program
Use this code to determine memory consumed by a PBASIC program. On the BASIC Stamp I, enter the following code at the start of your PBASIC1 program:

'***MEMORY USED***
READ 255,B0
DEBUG #B0
' ****************

Upon running the program, a number will display in the debug window of the editor. Use the following equation to determine how many bytes are used by your PBASIC1 code: 255 - # - 6; where # is the number displayed on the debug window. Note, the “- 6” in the equation results from the fact that the above two lines of code take 6 bytes of program space, thus without those two lines, your program takes 6 fewer bytes of space. 

Cores, Parallelism, Determinism
The little TSS machine has seven cores which is numerically defined by the Belkin HUB. As a purely academic comparison, the TSS can use all seven cores at the same time in parallel, with true determinism. This aspect is similar to a Propeller chip's eight cogs.

 

In this particular fashion, Propeller cogs can be simulated or emulated on a simple level. The TSS has huge robotics potential for controlling numerous sensors at the same time. Cores can operate servos while the vision center can continue to function, for example. If you have some of these tiny BS1USB boards handy, this is one way to find a good use for all the processors with this simple project.

In the TSS, seven of BS1 USB boards connect to a powereed HUB. Small pin connectors are enough for wiring when combined with several tiny solderless breadboards. Dimensions of this board are: 2.25 x 0.75 x 0.35 in (5.72 x 1.91 x 0.89 cm).

 

Running Core Software
============================================== Serial Communications programs are in the Handbook of BASIC Stamp Supercomputing.

This PBASIC code sets up the Master-Slave concept and establishes Talk/Listen rules for simple communication.
============================================== TinyAI is found in the BASIC Stamp SEED Supercomputer post (runs on ten cores).

PBASIC code utilizes ten cores to set up AI. The same program loads into each core and evolves. Requires ten deterministic pin circuits. The schematic is written in the software comments. In the code, remove three processors to run on the TSS.
============================================== TinyAI for the TriCore is found with the BASIC Stamp TriCore Supercomputer post (runs on 3 cores).

This code is written in PBASIC and utilizes three cores to set up AI. The same program loads into each core and evolves. Requires three deterministic pin circuits. The schematic is written in the software comments. In the code, add 4 processors to gain the total of 7, or run as is on the TSS using 3 processors, as a sample program.
==============================================

ANNOUNCEMENT
This is to announce the hobby TSS Tiny BASIC Stamp Supercomputer and update the family list of BASIC Stamp supercomputing machines.

The TSS is number SEVEN out of seven BASIC Stamp Supercomputers and Stamp Computing Machines. BASIC Stamp Supercomputers now include the following family. For links, refer to the signature.

BSS - BASIC Stamp Supercomputer SEED - BASIC Stamp SEED Supercomputer TRICORE - Three Cores MINUSCULE - Minimal Two Core Machine TSS - Tiny BASIC Stamp Supercomputer MOM - Master Offloader Machine TWO STAMP BSS (BS2sx + BSpx) AM - The Algorithm Machine

The Grapevine Speculation
Will there be another BSS? Considering that the BSS family and its spinoffs now encompass almost all BASIC Stamp boards and modules, it is possible that the torch may pass on to the Propeller chip. The question is, are there any new Stamp boards or modules that could be utilized in future projects that would show some new features? There is some thought about making a "super stamp" out of a Propeller chip. The Super Stamp would have the extra memory and speed (+cogs) of the prop, yet program in BASIC and have PBASIC functions and a similar module form factor. There is some discussion about using the SPIN Stamp for this purpose. One idea is moving towards more cost effective multiplicities. The propeller chip is about $1 per computer and this remains highly competitive. So what is coming up? You will begin to see some enhancements for modules and chips that can be applied to the BASIC Stamp and the Propeller chip, as well as dedicated supercharged machines.

AUTHOR COMMENTS
The education that I get from these supercomputers is the greatest value and it continues. The Basic Stamp Supercomputer is the first in a continuing line of similar projects with additional features and strengths. I consider each project to be a step on a ladder, reaching upwards towards a higher plateau of evolution. With each, there's testing and designing of new circuits and new software, and I do my best to make the details and plans available to everyone to hopefully have as much fun as I have and share in the information.

I began avidly putting multiple Stamps together back around the year 2002, to create a kind of bigger and better brain for humanoid robots. I recall experimenting with two to four connected Stamps to gain added ports and extended software commands and do serial control of servo motors. My overall goal was to create a giant brain that could power humanoid robots. The plan was to use upwards towards hundreds of BASIC Stamp processors!

I am still on the learning path of more powerful super computers, and have another BASIC Stamp version in the works that's very unique and useful. I have also progressed to the Propeller chip with eight cores. You have to blame those guru dudes on the forum for egging me on to start with the prop. They have caused such a propeller passion that consumes all my time! :)

You can read about the Propalot saga in "Propalot Stuff." It describes the continuing evolution of connecting together ten Propeller chips on a breadboard to create a tiny little paralleled cluster. This cluster is evolutionary from my viewpoint - containing 80 computers and 320 controlling ports, running at up to 2,000 MIPS. That's two billion instructions per second in a space the size of your dinner plate. The uses are learning, fun, trying out various designs, experimenting, wiring up hardware, learning SPIN and other languages, programming various effects, etc...

Another surprising benefit of the BSS and SEED supercomputers is that they bring new friends. Nearly every week, someone requests that I run one of the supercomputers through its paces. Of course the talking BSS is very impressive to my Chinese friends, because it's programmed it to speak in Chinese. But I must say, the SEED supercomputer, is loved by everyone. They enjoy watching the life forms evolve and to see their responses on the debug screen (such as getting to know the neighbors, memorizing, reciting, napping, sleeping, working, etc.) Each of the ten processors have a little beeping piezo speaker and we all know they are talking back and forth to each other in some kind of binary code.

One time, the program finished and about 10 minutes later - suddenly- they started beeping to each other. Your guess is as good as mine... I have no idea what they were talking about... (the program had become too big and some parts were overwritten and it took on a mind of its own)

 

Cherry Pie Tiny Super Computer Wannabe

MANUFACTURED BY HUMANOIDO LABS
CHERRY PIE: TINY SUPER COMPUTER WANNABE
It's finally here - Cherry Pie, a Tiny Super Computer Wannabe, for hobbyists and students who can't afford 55 million dollars for the real thing but want to build their own smaller working version for experimenting, learning, having fun and play.

The Cherry Pie attempts to use techniques to super-size your existing Propeller chips, multiply their "Cogs" and make a computing machine with more power, function and intrigue! Cherry Processors are less than a penny each!

INTRO & STATS
This is a cute tiny parallel platform almost like the big supercomputers on the Top 500 List. It has lots of parallel cores, multi-threaded processors, it's own fully functional real time operating system RTOS (for thousands of cherry processors) and interfaces galore for nearly every imaginable configuration (parallel, serial, full duplex, half duplex, party line, one wire, etc.). It's simple, homey, and a lot like cherry pie in likeability.

TECHNOLOGY
Cherry Pie is based on technology developed for the Spin Brain which has filtered down from the actual Big Brain that turned Supercomputer last year. These Tiny Wannabe Super Computers are fully operational, function in parallel, and have wee-tiny output monitors on each chip for experiments on a budget.

— We expect these will go like hotcakes once the schools discover they're a learning bonanza substitute for the real thing. —

— Educators state, switching to Cherry Pie <tiny super computer wannabe>, 55 million dollars or 55 dollars was an easy choice for students and the university' curriculum —

PRICING
They're almost a dime a dozen, though you'll still need to purchase from one to five Parallax Multi Core chips at about $7.99 each. But you can start with one chip and "supersize" its eight RISC cores to super computer stuffins classification, then add more chips as your wallet grows in increments of $7.99. This is about a dollar a hard core or CPU. Not bad! Throw in handful of common components from the electronic parts store and you should be ready to get started immediately! But wait! There's more! The cost of a single Cherry processor drops to less than a penny.

AMORTIZING
The amortized cost is far less. The enhanced Propeller chip rises from 8 RISC cores to a combined 1008 processors. Running five chips provides a total of 5,040 Cherry processors. As each chip is $7.99, the amortized cost per Cherry processor is only $.008 - not even a full penny per processor!

SPEED
The speed is also tiny. You'll need to pretend the actual thousand MIPs rating is thousands of times faster. But don't worry, we have several ways to load up the chips with enhancements that make this tiny machine "function" more like an actual supercomputer. With your hair flung back from hairspray and the fallout-wind of this tiny slick supercomputer wannabe, it's sure to be a win-win situation.

WANNABE
Wannabe is good - and not a bad thing, as proven by Daniel Hammer, professor of bioengineering at the University of Pennsylvania. He's reportedly working with artificial cells made from polymers, which can mimic the ease with which white blood cells travel through the body. These could deliver drugs directly where they're needed, making it easier and safer to fight off certain diseases, including cancer.

ADVANTAGES 
Cherry Pie has advantages. It doesn't need the support team of a lunar landing. It doesn't need a large room or entire building to hold it. It doesn't result in a monthly electric bill more costly than purchasing a house.

LINKS
SPIN BRAIN
BIG BRAIN
PARALLAX
PROPELLER CHIP P8x32A-D40
PROP PLUG 32201

to be continued

Make Big Fish Brains

Fricken Lamprey brain found in the sea

HOW TO MAKE BIG FISH BRAINS
ICHTHYOLOGY EPISTOMOLOGY
the study of fish with big brains and their knowledge

This blog is not only about creating larger fish brains, but also cultivating fish with increasing larger brains and brain power and then harvesting their brain power and abilities. Don't worry, no fish were sacrificed in these collective braining experiments.

You will be surprise at what big brain fish are doing!

Big brain fish is the master of its fishy universe

DO NOT HARM YOUR FISH
There is no fish dissection and no lobotomy in these procedures. No fish are harmed in any experiments. No brains are externally removed. All tests and procedures are non-invasive and many techniques used were previous developed by the Big Brain Initiative for machines and humans and are safe with external probes and sensors.

PROCEDURES
First you get a big aquarium and populated with a variety of "smart fish" that have ultimate natural massive brains with swollen heads, possibly with some brains protruding out of their bodies. The goal is to take schools of these fish as protos and cultivate numerous generations to develop a super brain fish. Generations of some fish are quite short and much can be accomplished in relatively short time.

Small Molly derivative breed big brain smart fish

GOALS
The intended goal of the big brain fish is to collectively join their brains via brain machine technology, which is non invasive, and to harvest their more valued parallel offerings. One goal is to improve the intellectual capacity of the fish and another is to increase the size of the fish brain, yielding more mass to the cranium.

Goldfish derivative smart fish

OVERVIEW
Smart brains are not the same as a general fish brain. The larger more intelligent fish brain is focused less on sex and food, and thus will have offspring in less numbers. It comes from having smaller stomachs and internal organs which is an elemental evolutionary point requirement in the support of a larger brain which captures more resources.(1)

SMART FOOD
Remember to use smart food when raising smart fish. This topic is comprehensive and could span several books.

GENETICS
Guppies are are hardy fish with rapid generation turn around time, whose genes may be ideal for these braining experiments.

BRAIN WAVE MONITOR MACHINE
Modifications are required to the Big Brain Wave Monitor machine sensor bundle to work underwater. Each fish will have a neural sensor or depending on the experiment, a collective harvester. The lead is placed as near the Cer. as possible (see diagram) while the neutral is moved to provide the best signal on the external monitor (see links).

CULLING SMART FISH
Culling smart fish is both an art and a biological science. The objective is to find fish within one generation of breed that are most conducive to the genes of larger brains, remove, and utilize to carry on the next generation.

CONNECTING MULTIPLE FISH BRAINS
When connecting two or more fish brains, do not connect from one brain to the next. Connect all brains in parallel by running the wires from each brain to the brain collection machine. This will ensure complete connections which can be tuned at a focal point. Tuning includes various methods of enhancing and conditioning the signal.

BRAIN STALL
To keep fish stable during the collective connection, the use of a brain stall is recommended. This keeps the fish stable and in the proper orientation for brain connection and during the procedure of brain extraction.

BRAIN MEASUREMENT
Brains are measured by photographic means. Each fish has a dimensional brain index. The volume of the fish brain is determined and weighed against various performances.

WHY FISH BRAINS?
Fish come from a totally different universe environment and have reached all their conclusions in a way completely different from humans and any land based animal. For this reason, the unorthodox uniqueness of their environment and thinking is provocative to a new kind of experimental exploration.

EXTRAPOLATING BRAINS
Ponder for a moment, the possibilities of big brain fish. Working fish. Talking fish. Thinking fish. Inventive fish. Creative fish. Intellectual fish. Helpful fish. Sarcastic fish. Multilingual fish. Smart fish. Super smart fish. Genius fish. Performance fish. Singing fish. Expressive fish. Fish solving human problems.

BIG BRAIN TIPS
Create a generation of big fish brains with natural pocket cavities in their brains to offset their added weight and act as floatation devices to balance fish bodies in the water. 

LINKS 
Big Brain Fish 
http://humanoidolabs.blogspot.tw/2013/03/mor-big-brain-fish.html

(1) http://phenomena.nationalgeographic.com/2013/01/03/scientists-breed-smarter-fish-but-reveal-the-costs-of-big-brains/

Lamprey - Wikipedia, the free encyclopedia
Lampreys are an order of jawless fish-like vertebrates, whose adults are characterized by a toothed, funnel-like sucking ...

Parallel Processing

PARALLEL PROCESSING TECHNIQUES
Chips with large numbers of CPUs are becoming more common. Another method is to use large numbers of existing single CPU chips to create massively large parallel machines. The latter has more flexibility in terms of design and programming. These are reconfigurable for many applications.

Some programming examples may include a worm that increments from one processor to the next as a validation demo. This could also set up an incrementing indice array. The array establishes a unique address for each processor which is used as a name in communications. Indice array organizational algorithms can act upon assignment processors to process information, concepts and ideas.

Perhaps more useful is the Parallel Hit that acts upon all processors simultaneously. Some uses are program loading, data propagation, preloading, initializing parameters, updating, communications, dividing a processing task, and conclusive reassembly.

SuperTronic Brain

Emergence of a New Brain
THE SUPERTRONIC BRAIN
Development Name SuperTronic 12

SuperTronic Brain prototype with Prop Plug ready for download

 




















* Robot Power Brain

* Autonomous Life Form

* Independent Function

* Academic Persuit

* Fun Hobby Experiments

* New Techniques Exploration

* Algorithm Development

* Intellectual Machine

* Parallel Trainer

* Learner 

THE RISING GIANT "BLUE MOON" event this week ushered in a new extremely powerful SuperTronic Brain. The SuperTronic Brain Machine is a living entity with 12,384 total computer processors on one board. It's designed for new applications that most likely no one has thought about.

THE NEXT GENERATION IS HERE! The SuperTronic takes the previous enhancements of the 32-Bit Parallax Propeller chip to the next level, incorporating more chip internal hard processors, new definitions of relative operating speed, various levels and types of processors, and a multi-chip hybrid deterministic parallel and hyper threaded environment and platform.

INTRODUCTION
The SuperTronic is physically smaller than the Big Brain, residing its power all on one board, with programming in Propeller Assembly and SPIN. C or C++ (with Parallax Propeller GCC) is an option as are many other languages (up to 240 programming languages, see the link below). GCC runs faster than Spin and exceeds the per chip 32K memory limit size by using the Large Memory Module LMM and Extended Memory Module (XMM). This opens up Float and the new machine also runs the new DISP language made up of DAs or Distributed Algorithms. As a parallel microcontroller machine, it can operate up to 384 ports simultaneously in either input or output modes and can be tri-stated for special applications.

OVERVIEW
The battery operated portable brain has access to distributed 768K RAM/ROM and 384K EEPROM. Relative speed of the SuperTronic is a blazing 32,640 MIPS or about 33 billion instructions per second. Including four different types of processors in high densities, the brain can offer solutions for a neural injection distribution platform.

SPECIAL TECHNIQUES

Such a platform can also handle many of the Lab's long term developed original techniques and inventions.

Cubing
Internal Transforming
Internal Teleportation
Nanites
Partitions

MIMs (Machines in Machines)

Cloning
Assimilation
Radio Brain Thought Monitor
Brain Wave Monitor BWMs
ParaP (PARP) Parallel-Parallel
Jump Over Communications
At-Once Particulator
Electronic Brain Fluid
Hyper Neural Threading
Brain Channeling
No Parts Invention
Intellectual Surfing
Shape Shifting
Internal Swarming
Neural Injection
Que Messaging
OffSetting
Arraying
Hybriding
Wire Sharing
Soft Wiring
Power Reduction
Intellectual Docking
Wireless Remote Control

KIT DETAILS
Retail cost for Propeller chips to populate the board are available in the USA from Parallax at under $100 for twelve Propeller chip "socket installments." The SuperTronic Brain Kit includes a Green Board. Additional parts required for assembly include Parallax P8X32A 32-bit Propeller chips, LEDs, decoupling capacitors, dropping resistors, sockets, and EEPROMs.

PERIPHERALS
Optional brain hookup includes a terminal, LCD, TV, Mouse, Game Paddle Controllers and Keyboard. A small kit of resistors and a socket is all that's required to add VGA output. Speech requires earphones.

The SuperTronic Brain could also be applied to many of the Big Brain peripherals.

Universe Penetrator
Adjunctive Array
Multi Mag Slider
Slipstream Drive
Transporter
AntiVortex Device
Robotic Reel
Micro RADAR
VARF
Walking Secondary
Intelligent Mirror
MLT
$5 Quadcopter
Pinhole Machine
Waterdrop Devices
ULT Ultra Large Telescope
NULT New Ultra Large Telescope 
GT Genius Telescope

APPLICATIONS
One aspect of this powerful brain would include functioning as the work horse in a private space program. It fits telemetry, data processing and number crunching, and has access to autonomous guidance routines and optical management.

SOFTWARE
In House Lab Software tailored for this one board solution is tentatively expected to include the Propeller Brain RTOS Real Time Operating System (The SOS is a SuperTronic Operating System.), a Multi-Chip Parallel Loader, a Processor Enhancer, Multiple Threader, Timing Manager, Enumerator, and details about the Cloner. Additional software is found at the Parallax OBEX.

MANUAL & STACKING
The machine assembly manual will use a verbal (word) schematic so construction is ultimately simple. Stacking is possible. With ten boards, the processor count equals 123,840 and the speed rises to 326,400 MIPS, though power increases based on operating mode.

CONSTRUCTION
Construction as seen in the photo shows the first prototype (working) assembled on a solderless breadboard with the first test wiring. At right is a Prop Plug ready for downloading software. This config has an accurate crystal controlled time base and a 32K EEPROM to store programs. Also visible is the electrolytic filter and 10nf decoupler capacitors. The prototype shown has two extra temporary driver chips which will be removed after testing.

PROGRAMMING LANGUAGES

Recommended programming languages include Propeller Assembly and SPIN. The Propeller chip has access to approximately 232 programming languages, versions & variations along with five programming language converters and methods, for almost any kind of experimenting and academic persuit. (see link below)

LINKS
Ultimate List of Propeller Languages
http://humanoidolabs.blogspot.tw/2012/03/ultimate-list-of-big-brain-languages.html

Blue Moon
http://earthsky.org/astronomy-essentials/when-is-the-next-blue-moon