Brain Cortex Capacity Part 34

The capacity of a brain increases with the number of processors which is related to the number of chips. When the chip density approaches 100 chips, the capacity for processors increases to 100,000 times more and beyond. INTELLIGENCE is a multiple subset of this processor relationship. This is related to neural capacity. It's expected that jar density will greatly increase with the use of specially designed boards. Large jars are currently waiting as cortex confinement vessels for extremely large brains currently up on the designing board. In this photo, an experimental 100+ chip big brain is running several connection machine experiments. This shows two design integrations, one in the back is an exoskeleton where the boards and components and wiring are on the outside, and second, high density boards in the front can hold over 192 RISC processors per board. Chips are Parallax Propeller.

BRAIN CORTEX CAPACITY
PART 34
Build a brain cortex with one chip or with one hundred chips. The neural capacity does not multiply 100 times for 100 chips. Neural capacity is multiplied 100,000 times. Imagine the power of a cortex 100,000 times more powerful than the current designed brain cortex in a jar.

Would it fit in a jar? Only if the jar is a big one! How big? Currently the lab has a big 5-liter jar. After some tests and redesigns, a new high density cortex will be placed inside but this is a future project.

The cortex is a different kind of machine animal with purposes entirely different from the Big Brain. Though technology from the Big Brain has made the Cortex possible, its purpose is very unique, i.e. both transferring a part of a human brain into the machine jar and increasing the jar's counterpart life span towards a state of immortality.

The base capacity of cortex intelligence "I" is based on a fundamental eight RISC processors. So doubling the "intelligence" of the cortex requires sixteen RISCs and the expansion is:

 Intelligence = 8n1 + 8n2 + 8n3 + ... where n is a factor multiple of 8. So the cortex can have an intelligence increase by adding cores. A chip has eight RISCs so three chips will have 24 or three times the intelligence.

Since limitations at the upper end allotment for configurations are currently allowed at 800 processors, the expanded cortex can have up to 100 times the intelligence level of the first cortex.

Machine cortex intelligence is based on DNA or birthing knowledge, the size of long term and short term memory, conversation capability, thinking, asking questions and the ability to continually learn new things.

MACHINE CORTEX INTELLIGENCE NI
* DNA
* Memory
* Conversation
* Thinking
* Questions
* Learning

ABOUT THE MACHINE CORTEX BRAIN PROJECT
This project objective is to develop a cortex machine brain, demonstrate a human-to-machine brain transfer, in particular to take some relatively simple characteristics of a human brain and transfer portions to the machine brain, whereby human traits could be given a greater life longevity, leading towards immortality.

Index to the Brain Cortex
http://humanoidolabs.blogspot.tw/2013/11/brain-cortex-index-part-16.html

Near Space Test

NEAR SPACE TESTING
A number of tests are planned for the upcoming human launch into Near Space. One, we hope to use a man-operated tiny telescope to explore daytime and/or night time objects from space. Two, what is the functioning of GPS satellites as established through a smart phone during launch, at variable positioning, at high altitudes, and from the apex of Near Space?

QUESTIONS
Answering these two questions, according to the Big Machine Brain program and the Space Exploration Initiative will be important to putting our exploration astronauts into space, and in fulfilling the Prime Directive for manned exploration.

BIG BRAIN SPACE PROGRAM - TYPES OF SPACE

https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjrvkfTlzMPCHVmnp0pwOJM9vM2yT6JexXz5ztofe6yBk8saMZc0I4RDdVGAxC7Uo3igxYTR_4oqs0FlUWgCEhHHmCffSXMqa45GecBOn82wItN5T1G1ZFCkHYyuJiFjGotHtouD635cVz7/s1600/space.jpg

PHOTO
The photo shows space through the very large PGT-ET telescope which has multiple adjuncts in space and ground operations using a supercomputer. We don't expect results like this with the Tiny Space Telescope we're taking with us during the upcoming Near Space flight this week. The goal is imaging on the Sun, Moon, or a bright star for future celestial navigation.

VIEW PORT
The telescope test could be a success or a failure, as last time we had some challenges faced with the view port window. These windows tend to electrostatically collect dust and debris, easily scratch from the ravages of space travel (our spacecraft is reusable), and develop patches of moisture and condensation from the double layering with trapped moisture and the extreme temperatures of space. The view port also develops internal and external reflections with its multiple layering and absorbs and reflects light. It may also introduce distortion as the view port material is not optically flat.

http://humanoidolabs.blogspot.tw/2013/04/pgt-et-telescope-stars.html

TELESCOPE
The tiny telescope is currently more about testing ideas for navigation in space, for spacecraft and space object positioning. For example, the Big Brain may want to launch/release a tiny satellite into space and having a better understanding of how to orientate that spacecraft will become important.

http://humanoidolabs.blogspot.tw/2013/04/telescope-for-near-space.html

TSAT & SPACE TELESCOPE
One long range goal is the release of a TSAT (a temporary space satellite) and/or a tiny space telescope that will spend some time in space before its position decays.

http://humanoidolabs.blogspot.tw/2012/12/temporary-satellite-tsat.html 

High Speed Propeller Chips

Big Brain Focus - Propeller chip
HIGH SPEED PROPELLER CHIPS
The speed of the Parallax Propeller chip is already fast. By following the wondrous work of Master Beau Schwabe, the chip can be made amazing-blazing fast!

Beau has worked years carving out new elements for the Propeller chip, making possible transformations that the Big Brain is keen on adapting for supercomputer status.

One of these working miracles is the ability of chip to chip communication in excess of one million Bytes per second! A DIY Data Pipe can multiple this a hundred times!


BEAU SCHWABE OF PARALLAX: Here is a derivative of the high speed 8.42 Meg Baud (1.05 Million Bytes per second) Prop-to-Prop communication that I wrote some time ago. Last March there were several changes to the front end of both the Receiver and the Transmitter in the way that the handshaking took place. Before you had to make sure that the Receiver was up and running before you Transmitted... this is no longer the case, now it doesn't matter making it more user friendly. For just the average user, it's pretty straight forward... there is only one command to Send, and there is only one command to Receive. 

Basic Use:
To receive, just specify the pin you want to listen on and the address of where you want the received data to go to. Remember, this transmission is designed to send large packets of data, so if your just sending a few bytes here and there, this object is probably not for you.
RX(_Pin,_DataAddress)
To Transmit, is basically the same thing with a few more parameters... you specify the pin you want to yell on, the address of where the data is coming from, How much data you want to send in longs.
TX(_Pin,_DataSamples,_DataAddress,_00, 0)
Note: the last two fields are not used in the Basic setup, they will be discussed in Advanced Use. So that's it for basic use. 

Advanced Use:
The Receive is just the same as before, but it can be used as a function to return additional. information from the Server.
Command := RX(_Pin,_DataAddress)
This will receive data just as before and place it in the assigned address, but Command contains the size of the transmitted packet, a destination offset, and a Packet Command. Organized as such...
%ssssssssssssss_aaaaaaaaaaaaaa_cccc
where:
s = 14-Bit Packet Size
a = 14-Bit Destination Offset
c = 4 Bit Command
The Packet Size is obviously useful for determining how much data you received and allows support for variable width packets. The Destination Offset is unique in the sense that the Server has some control as to where the Data will end up on the receiver. Basically this value gets added to the DataAddress that you specify on the receiver so that the incoming data is written to a location starting at the DataAddress plus the Offset. This feature allows random block writes from the Server to the Client. The 4-Bit Command is just a way for the server to pass a specific command to the receiver. It can be used for anything you want. It's up to you.
For Transmission, it's just the same as the Basic Transmission as well, except the two parameters that were Zero'd out now have some meaning.
TX(_Pin,_DataSamples,_DataAddress,_DataCommand,_Of fset)

DataCommand as just mentioned is a 4-bit command you can pass directly to the Client and can be used for anything you want.
The Offset, also just mentioned, can be used to tell the receiver to write data to another location. This is useful when you only want to update a block or section of memory on the Client.
 
Finally, supplied Demo programs show a round-robin approach to sending data across multiple Propellers. The Idea is that you have one buffer that every Propeller sends around the loop ... "infinitely." To prevent collisions, ALL Propellers have access to reading the entire buffer, however, and this is what makes it work... Each Propeller can only write to a specific assigned location of that buffer. This isn't exactly true, but it's a good programming practice to implement. There aren't any collisions for similar reasons that you don't have collisions from COG to COG on a single Propeller. When a Propeller reads the Buffer, he is only allowed to write to the section that he is assigned to before sending the Buffer on to the next Propeller. (Note the Demo Code has this restriction lifted and can write to any location on the Buffer... But in my description, that's how you would typically manage the data across multiple Propellers and avoid collision. It works in the Demo, because there is only one Propeller writing to the buffer) In the Ring*, you can have as many Propellers as you want, with each Propeller only having a 3-wire interface... (Ground, TX, and RX) ... I have tested up to 5 Propellers with the supplied demo code. One Propeller must be identified as the Server to initiate the data ring, but all of the other Propellers are identified as Clients. Within each Propeller regardless of Server or Client ALL Propellers have equal access to the Data Buffer. I Hope this makes sense... Enjoy!!

Note: added a slightly newer version that addresses detection of the USB plugged into the PC. This prevents unwanted resets. Check this link out for a way to control switches across multiple Propellers, i.e. for lighting 
 

• High Speed Multi-Prop to Prop Communication.zip‎ (13.6 KB)
• High Speed Multi-Prop to Prop Communication_v2.zip‎ (14.7 KB)

Beau Schwabe | Parallax Semiconductor IC Layout Engineer Parallax Inc. * 599 Menlo Drive * Rocklin California 95765
www.parallaxsemiconductor.com
http://forums.parallax.com/showthread.php/134641-DEMO-High-Speed-Multi-Prop-to-Prop-Communication

*Note: in the case of the Big Brain, the Ring exceeds 100 chips with 800 cogs and enhancements for nearly a million processors.

14.5 Meg Baud Upgrade Ok, beta testers... I have run this DEMO and tested over 100 Billion data Bits with no Transmission Errors over the distance of 10 feet from one Propeller to another Propeller. Here is a beta release before I place it in the object exchange. ...· Enjoy!!
http://forums.parallax.com/showthread.php/99222-Propeller-DEMO-14.5-Meg-Baud-High-Speed-Prop-to-Prop-Serial-Communication 

Paper Plastic or Polyester?

Photo 1

PAPER PLASTIC OR POLYESTER?
New High Tech Bag Holds Your Goods

Walk into Family Mart and you may walk out with the latest high tech or low tech bag, depending on how you look at it.

Photo 2

As seen by the texture in the photo, the bag is a type of fabric polyester, which is not the only differentiating feature from conventional bags.

Photo 3

This one appears to have a series of oval cuts made at various positions. When you place a food box (or iphone) in the center and grab the sides, a carry bag is formed. (see Photo 1)

Presumably it's much easier and lower cost to merely cut a piece of square material.

Photo 2 shows the fabric material texture similar to polyester and the oval-shaped cuts.

Photo 4

Photo 3 shows placing an object in the center. Note, the bags cannot be used for very small items that may fall through the openings. For boxes of food, the bags work great.

Photo 4 shows the two sides grasped and being raised, and the position of the weight in the center relative to the sides and the shape of a bag being formed. This may look similar to a Fresnel lens.

Photo 5

Photo 5 shows the bag ready to be carried.

DIY Your Own Bag
You can DIY your own bag with a flat piece of polyester and a scissors. Just cut out the indicated pattern in photo 2.

High Performance Cluster Computing

Humanoido Labs - PROPELLER POWERED BIG BRAIN

BIG BRAIN ENTERS HIGH PERFORMANCE CLUSTER COMPUTING

The range of Macs

All hands on deck - The Brain has the best of several worlds including Arrays of Parallax Propeller chips on the left hand and a cluster of Macs on the right hand. Working together it looks as though they can take on any project we put in its path.

We expand the Left Brain with Parallax Propeller Arrays and expand the Right Brain with Apple Macs..

Improvements in parallel processing on the left and right hands have ushered in a new era for the Brain. Tasking is divided up in Parallel across several Macs which can be expanded in the cluster. Performance continues to improve and increase as Macs are added to the Cluster. Software runs on each clustered computer to enable parallel computing. Even with a small Right Brain addition, the add-on can amplify the speed 2X and 5X for significant TeraFLOPs processing gains.

One thing about Parallel computing.. One cannot just run a program like PhotoShop. The app must be developed and programmed specifically for parallel computing. One potential here for this system is programming in ForTran language and it would be interesting to have a Parallel ForTran. Apps can be developed in other languages, even BASIC versions.

By trashing keyboards and monitors and running code on one Mac designated resource to remotely control the other Macs, the overall config can be simplified and reduced in cost. Need to compile your parallel Mac code? Check these sources.

Metrowerks CodeWarrior Pro for OS 9 or X
http://www.freescale.com/webapp/sps/site/homepage.jsp?code=CW_HOME&tid=vanCODEWARRIOR

Xcode 2.2.1 for X
https://developer.apple.com/technologies/tools/

Absoft Pro Fortran for OS 9 or X
http://www.absoft.com/

cc for OS X (gcc 3.1 or later)
https://developer.apple.com/technologies/tools/
 
g77 (via fink) for OS X
http://fink.sourceforge.net/
 
Project Builder for OS X
http://developer.apple.com/tools/macosxtools.shtml
 
IBM's xlc for OS X
http://www-3.ibm.com/software/awdtools/ccompiler

IBM's xlf for OS X
http://www-3.ibm.com/software/awdtools/fortran

NAG's f95 for OS X
http://www.nag.com/

Intel's ifort for OS X on Intel
http://www.intel.com/

gcc for 64-bit Intel Linux
http://publib.boulder.ibm.com/infocenter/iisinfsv/v8r7/index.jsp?topic=%2Fcom.ibm.swg.im.iis.productization.iisinfsv.install.doc%2Ftopics%2Fwsisinst_set_envars_cpp_gcc64.html

Typical Mac Categories for Clustering
iMac
iBook
MacBook
The lists continue here: en.wikipedia.org/wiki/Apple_Inc.
http://en.wikipedia.org/wiki/List_of_Macintosh_models_by_case_type